Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[itsmydamnation]

Spec dot org has results for the E1050 96 core. Just do a search on google for spec results for ibm power processors and it's one of the first entries.

To give you some perspective:
IBM Power E1050 (2.95 - 3.90 GHz, 96 core, AIX) - [768 instances, 4 chips, SMT8, only 2 threads per core in use) SpecRate2017IntBase=1220 , Peak=1580
IBM Power E1080 (3.55 - 4 GHz, 120 core, AIX) - [120 cores, 8 chips, 960 instances] = SpecRate2017IntBase=1700 , Peak=2170
Kaytus KR1280E2 (AMD EPYC 9754) (256 cores/512 instances) - SpecRate2017IntBase=1930 , Peak=2100
Kaytus KR1280E2 (AMD EPYC 9654) (192 cores/384 instances) - SpecRate2017IntBase=1800 , Peak=1920
Dell PowerEdge R6625 (AMD EPYC 9754 128-Core Processor)- (256 cores/512 instances) = SpecRate2017IntBase=1820 , Peak=1980
Dell PowerEdge R6625 (AMD EPYC 9684X 96-Core Processor) - (192 cores/384 instances) = SpecRate2017IntBase=1790 , Peak=1870
ZTE R8500G5 Server System (1.90 GHz, Intel Xeon Platinum 8490H) - (240 cores/480 instances) = SpecRate2017IntBase=2000 , Peak=2050
HPE Compute Scale-up Server 3200 (1.90 GHz, Intel Xeon Platinum 8490H) - (960 cores/1920 instances) - SpecRate2017IntBase=7310 , Peak=[Not submitted]

IBM Power10 can be configured in a performance competitive manner, but, it doesn't look like they are competitive on a "per-core-throughput" basis.

Power is not Z, Power is SAP / HANA Queen , Power is most large banks or larger org who has large systems from 80-90's.

 

[LightningZ71]

Yeah, the Z16 telum seems to be well guarded for it's performance specs...

 

[itsmydamnation]

Yeah, the Z16 telum seems to be well guarded for it's performance specs...

Yeah it's got the crazy large L2/L3/L4 setup with really good latency, very wide core and very high clocks. It wouldn't surprise me if it's performance is super good for the 4 use cases it has today and if you have to ask what those use cases are then your not the target market and they aren't looking for no pr wins.

Funny(not really) story but I have seen multiple z mainframes with absolutely horrible network setups. Internal to mainframe packet sizes are 32k to 64k bytes , when two mainfames want to talk to each other over an regular IP network most don't config a tcp mss ( seen it 3 times now) and you get 20-40 pack fragments and the slightest network hickup and all the transactions die in the arse.....

 

[Henry swagger]

LNL Lion Cove is +14%. History would suggest ARL Lion Cove will differ only by the addition of a faster memory subsystem and cache structure and as such I would expect at most an additional 5% IPC and mainly in applications that can utilize more L3, like games. So I'm prediction max IPC increase for Lion Cove at 19%.

As for the lack of HT, it made no sense to me either until Gracemont morphed into Skymont with Raptor Cove IPC at 1/3 the area. That's a game changer for MT and does seem to make ST moot for the big cores. It also has the additional benefit of simplifying things for the Thread Director.

Plus lion on desktop will have higher speed ddr5 10k oc.. that another 5% boost from memory. Specint and geekbench love fast memory

 

[itsmydamnation]

Plus lion on desktop will have higher speed ddr5 10k oc.. that another 5% boost from memory. Specint and geekbench love fast memory

Spec int and GB don't care about bandwidth they care about latency , you can already dial that latency down if you want and it's unlikely to be any lower latency then what you can get today.

 

[MarkizSchnitzel]

Most here keep saying that Intel has been power hungry in laptops.

But when I took notebookcheck battery life tests for wifi browsing and video playback, and not even "normalized" for screen (lots of newer devices come with 3K 120HZ OLED, compared to FHD 60HZ IPS), Meteor Laku U is only second to Macbook Air, on par with Snapdragon X (only 1 device in dataset), with only a couple Ryzen devices in this list near top (Thinkpad T16, Zenbook 14 OLED).

So, what gives?

 

[H433x0n]

LNL Lion Cove is +14%. History would suggest ARL Lion Cove will differ only by the addition of a faster memory subsystem and cache structure and as such I would expect at most an additional 5% IPC and mainly in applications that can utilize more L3, like games. So I'm prediction max IPC increase for Lion Cove at 19%.

As for the lack of HT, it made no sense to me either until Gracemont morphed into Skymont with Raptor Cove IPC at 1/3 the area. That's a game changer for MT and does seem to make ST moot for the big cores. It also has the additional benefit of simplifying things for the Thread Director.

It’s not going to be +5% IPC unless there are some bigger than expected changes. Raptor Cove netted 2-3% IPC from 60% more L2$, in this case it’s Lion Cove gets 20% more L2$. It’s more likely that the desktop specific SoC tile and increased L1->L2 bandwidth has a bigger effect.

I would expect 14% IPC, at best 16%.

 

[coercitiv]

Most here keep saying that Intel has been power hungry in laptops.

But when I took notebookcheck battery life tests for wifi browsing and video playback, and not even "normalized" for screen (lots of newer devices come with 3K 120HZ OLED, compared to FHD 60HZ IPS), Meteor Laku U is only second to Macbook Air, on par with Snapdragon X (only 1 device in dataset), with only a couple Ryzen devices in this list near top (Thinkpad T16, Zenbook 14 OLED).

So, what gives?

When it comes to battery life, Intel had a troublesome period starting with early Skylake and ending with Raptor Lake. They had two compounding issues, one was lack of improvements to platform idle power draw, the other was pushing the power limits in order to chase performance wins (yes, they did it on laptops too).

Meteor Lake was their first product in a long time that addressed some of these issues, it tried to improve idle power consumption and also low load power consumption. In some ways it succeeded, but when it came to mixed usage it still fell apart. For example the competition quickly figured out Intel's products could not compete in multi-user video calls, both AMD and QC showing major battery life wins when using Microsoft Teams.

The "power hungry" reputation may also indirectly come from the higher power limits Intel's been pushing on their mobile SKUs. All modern CPUs have a target TDP and a boosting power limit that allows them to use more power than the TDP target for a limited period of time. Intel's been steadily pushing this limit from numbers close to +50% to numbers higher than +100-200%. The effect it had on battery life is debatable, because power limits vary when the laptop is using a charger or using the battery, but the users of these laptops got to experience the joy of fans ramping up and down repeatedly under burst loads. The average user may not know what idle power consumption is, they may not know what power profiles and power modes are, but they sure know that a CPU that is repeatedly ramping up the fans on seemingly easy tasks is "power hungry".

One of the things pointed out by early Snapdragon X Elite testers was the lack of aggressive fan ramping. The new Qualcomm chip can use a lot of power too when pushed hard, but the stock platform configuration leans more towards convenience and silent operation. This stock config affects performance scores obviously, but it also drastically improves user experience, especially when the chip is powerful enough to give up some performance and still feel fast and responsive.

To wrap this up, we recently got a leak about the upcoming Lunar Lake SKUs, and it contained power limits for these SKUs. Most of them have a TDP of 17W and a PL2 of 30W. That is extremely similar to the SKUs in the Haswell and early Skylake era, when ultrabooks were powered by 15W TDP chips with ~25 PL2 (especially considering LNL is using ~2W on the memory included on package). For comparison here's a Meteor Lake i7 165U with 15W TDP but configurable up to 57W PL2.

I don't know how good LNL will be versus the competition, but it's the first sign of return to sanity from a company that panicked 10 years ago and stopped understanding basic user needs, focusing solely on looking good in reviews and marketing slides. They are finally focusing on engineering solutions for reduced idle power consumption while at the same time trimming down boost power. This will inevitably results in better battery life, better noise profiles and may indirectly help CPU architects sell optimized designs internally, because higher execs can no longer say NO and rely on power limits to carry them.

There, now don't ever ask a question like this again and expect a straight and short answer!

 

[Nothingness]

Spec int and GB don't care about bandwidth they care about latency , you can already dial that latency down if you want and it's unlikely to be any lower latency then what you can get today.

That's right, though It depends on the subtests.
SPEC int 505.mcf 520.omnetpp and 502.gcc (and to a lesser extent 523.xalancbmk) are sensitive to bandwidth.
OTOH most subtests are sensitive to latency (in particular 505.mcf 520.omnetpp and 557.xz), though some mostly don't care (548.exchange2 541.leela 525.x264).

 

[ondma]

I think a lot of people would have been arguing a LOT more strongly against HT if we knew how big the die penalty had become. It was claimed to be 5% originally which was pretty minor - and when HT hit the scene it wasn't like additional cores were an option since dual core was only just appearing on the scene since you can't have 1.05 or 2.10 cores. Few people reading this are actually architects, we didn't know about the increasing penalty for implementation of HT until it was pointed out by someone in the position to know.

Even if there was zero gain in ST as a consequence of HT's removal if you save 15% of die area in your cores that means you can have 15% more cores to provide MT uplift. And not the kind of "single digit gains here, 20% there, oops bit of a regression here, oh hey here's one outlier we can point to that gains 30%" uplift that HT gives, but 15% across the board. And no static power penalty, given that you can't effectively gate those extra transistors sprinkled across the core so you're paying a penalty in static/idle power over cores that don't implement HT.

And that's before you get into the additional man hours required for design and validation, and the security headaches we've seen with side channels for processes sharing a physical core.

Here's the thing though. I dont know if omission of HT does in fact save 15% die area, but whatever it saves, Intel didn't use the savings to add more E cores. I suppose one could argue that they used the savings to enlarge and improve Skymont, but otherwise, it seems they just gave up HT for no obvious compensating benefit. Personally, I think they gave it up because their P cores, even after a "redesign" and moving to a better node are still too power hungry, and they gave up HT to help get power usage under control.

 

[DrMrLordX]

Arrow Lake might have 24 cores. No HT in sight.

24c is expected (8+16). That was the max core config for Raptor Lake as well.

And I have to wonder why there's so much love towards SMT in this forum. Most desktop users won't benefit at all from SMT but would from reverse SMT - rentable units of whatever - which would use unused cores/parts of them to boost single-thread performance.

SMT exists and works. Rentable units, however . . .

 

[coercitiv]

Here's the thing though. I dont know if omission of HT does in fact save 15% die area, but whatever it saves, Intel didn't use the savings to add more E cores.

Everything Intel and AMD saved in terms of core optimization this generation... went into the NPU. You can thank MS for that.

To give a sense of scale, if we exclude the L3 cache, the 4 Lion Cove cores in LNL are smaller than the NPU.

 

[TwistedAndy]

Most here keep saying that Intel has been power hungry in laptops.

But when I took notebookcheck battery life tests for wifi browsing and video playback, and not even "normalized" for screen (lots of newer devices come with 3K 120HZ OLED, compared to FHD 60HZ IPS), Meteor Laku U is only second to Macbook Air, on par with Snapdragon X (only 1 device in dataset), with only a couple Ryzen devices in this list near top (Thinkpad T16, Zenbook 14 OLED).

So, what gives?

Power consumption and efficiency are complex things to research. And there are a lot of people thinking that the SoC consumes PL1/PL2 all the time.

In general, Meteor Lake is a mediocre platform in terms of absolute performance, but it's good in terms of efficiency and battery life.

Here's the thing though. I dont know if omission of HT does in fact save 15% die area, but whatever it saves, Intel didn't use the savings to add more E cores. I suppose one could argue that they used the savings to enlarge and improve Skymont, but otherwise, it seems they just gave up HT for no obvious compensating benefit. Personally, I think they gave it up because their P cores, even after a "redesign" and moving to a better node are still too power hungry, and they gave up HT to help get power usage under control.

Modern CPUs are all about Performance/Power curves.

For example, in mobile devices, it makes sense to get 5% more performance on the same power limit and improve ST and low-MT power consumption:



As for desktops with much higher power limits, it makes sense to have HT. Maybe we will have HT enabled for ARL-S and ARL-HX and disabled for ARL-P and ARL-H.

But, again, it depends on the actual performance/power curves and the target power limits. I can hardly imagine how I can use more than 24 cores in my current development environment.

 

[itsmydamnation]

That's right, though It depends on the subtests.
SPEC int 505.mcf 520.omnetpp and 502.gcc (and to a lesser extent 523.xalancbmk) are sensitive to bandwidth.
OTOH most subtests are sensitive to latency (in particular 505.mcf 520.omnetpp and 557.xz), though some mostly don't care (548.exchange2 541.leela 525.x264).

And what most people care about here, games is exactly the same most care about latency.

I remember it even being pronounced back in DDR3 era where bandwidth was tiny compared to today. There's a thread from like 10 years ago where I tested high NPC areas of games with only changing memory focused on latency , best access time in ns regardless of memory speed won.

 

[poke01]

https://twitter.com/x/status/1805861104087875618

Thoughts on this? I agree.

 

[coercitiv]

Thoughts on this? I agree.

I concur. It will continue to erode Intel's mind share even if the new products are good.

Some may be tempted to think people will forget, which is true in part, but there's a non-zero chance reviewers will bring up the stability issues right on ARL review day. They need to close this (as in make it right) well in advance.

 

[SiliconFly]

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[SiliconFly]

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[Nothingness]

And what most people care about here, games is exactly the same most care about latency.

I remember it even being pronounced back in DDR3 era where bandwidth was tiny compared to today. There's a thread from like 10 years ago where I tested high NPC areas of games with only changing memory focused on latency , best access time in ns regardless of memory speed won.

I was only answering your claim about SPEC. You didn't mention games in your previous post 😉

 

[SiliconFly]

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[AcrosTinus]

Yep. Rentable Units is pretty much an imaginary tech at this point. Either what Ian said is true, or Intel is very good at keeping secrets. And the former makes more sense as of now.

Fake News being propagated as if it is true these "Rentable Units" don't exist and don't be disappointed if rumors don't materialize, the same for "Royal Core", it is all hype. At the end we have actual announced products and reviews using standard tools to validate them.

 

[Klingenberg]

Neither. After years of lagging competition, Intel has finally caught up (in almost all areas). That in itself is a massive feat! They're both almost at par now. A few percent points difference shouldn't be considered a big win.

Things may actually change a lot depending on how both the companies execute in the future. But not anytime now imho.

Based on LNC/Zen5 leaks, it looks like 2024 is gonna be the year of the equals.

The year of the equals, that's the most quotable thing you've said haha.

I dunno what to say exept for the fact that I almost always remember it being a prefference choice, and a slight period of AMD for gaming and Intel for office builds

 

[AcrosTinus]

https://twitter.com/x/status/1805861104087875618

Thoughts on this? I agree.

I still think the problem is largely overblown. If the numbers would really be as high as people think it is a class action suit would have been started.

In my opinion a smear campaign to lower the mindshare of Intel which is already under attack due to a self inflicted wound.

 

[SiliconFly]

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[whoshere]

Lunar Lake GB6 results running at roughly 4.9GHz:

https://browser.geekbench.com/v6/cpu/6678431 (ST: 2739)

https://browser.geekbench.com/v6/cpu/6678564 (ST: 2713)

An IPC increase is there but I expected more.

At 6GHz that would be 3,353 which is just 8% faster than 14900K Raptor Lake. Not really exciting but then it's a mobile platform, so Arrow Lake should fare better.