Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[511]

How can these benchmarks be accurate 20000 like come on even U5 is 16000 how is it so accurate 😂🤣.
Don't think these are real

 

[DZero]

This is a freaking dissaster. They are average on the high tier, but in the low ones are really awful. Remember the sad days of the 28nm AMD Carrizo... but with the funny story that they could went with the 3 module/6 threads and still make some impact.

 

[Meteor Late]

How can these benchmarks be accurate 20000 like come on even U5 is 16000 how is it so accurate 😂🤣.
Don't think these are real

Yeah there is just no way the two scores are so clean lol

 

[Hitman928]

How can these benchmarks be accurate 20000 like come on even U5 is 16000 how is it so accurate 😂🤣.
Don't think these are real

Agreed, they look like estimates. The question is how informed the estimate is.

 

[Magio]

It looks like random estimates alongside the max cTDP number for the part, it certainly doesn't look like a leaked benchmark with the actual power consumption.

 

[Khato]

I wouldn't ignore the possibility of the numbers being based in reality. In which case it just indicates that PTL doesn't scale beyond a 45W PL1.

 

[DZero]

I wouldn't ignore the possibility of the numbers being based in reality. In which case it just indicates that PTL doesn't scale beyond a 45W PL1.

AMD Carrizo's situation... sad story... I can believe this too, so that means... no desktop parts or if there, only low and mid tier one?

 

[Khato]

Pretty sure there have never been any desktop PTL parts planned. It may mean that the PTL HX 'mobile desktop' parts aren't quite as interesting for that purpose? But we'll likely have to wait until products are actually available to get an idea of how PTL scales beyond the 15W/25W/45W targets.

 

[Thunder 57]

Pretty sure there have never been any desktop PTL parts planned. It may mean that the PTL HX 'mobile desktop' parts aren't quite as interesting for that purpose? But we'll likely have to wait until products are actually available to get an idea of how PTL scales beyond the 15W/25W/45W targets.

Rumor seems to be that higher end NVL will be N2 with the lower power parts being 18A. Maybe 18A isn't ready for high power?

 

[DavidC1]

The GPU scores at least isn't "clean". 6830 Time Spy is GTX 1080 Mobile level.

 

[poke01]

The GPU scores at least isn't "clean". 6830 Time Spy is GTX 1080 Mobile level.

Yeah the iGPU is excellent

 

[DavidC1]

From Exist 50:

They seem to be using "B-series" and "C-series" labels instead. Though no matter the exact terminology, it's crazy to make Xe3p the dividing line instead of Xe3. Xe3 is a much bigger change than Xe3p is.

I thought so lol.

Xe3 is already ~20-30% better per compute than Xe2. It'll take a lot to deliver more than that.

I assume the earlier 6200 leaked score is at about 30W and 6800 is higher at maybe 45W.

 

[511]

From Exist 50:

I thought so lol.

Xe3 is already ~20-30% better per compute than Xe2. It'll take a lot to deliver more than that.

I assume the earlier 6200 leaked score is at about 30W and 6800 is higher at maybe 45W.

Well Xe3 is Xe2 Plus it's a nice improvement though they focused on fixing the PPA and the HW Utilization issues and bigger caches.
I still don't believe any leak this site post's

 

[DrMrLordX]

Rumor seems to be that higher end NVL will be N2 with the lower power parts being 18A. Maybe 18A isn't ready for high power?

Intel will probably be capacity-constrained, especially once 18ap hits the scene. But 18ap should be better-suited to high clocks/high power applications than 18a.

 

[adroc_thurston]

Maybe 18A isn't ready for high power?

No, N2p is just a much faster node.

 

[DavidC1]

Well Xe3 is Xe2 Plus it's a nice improvement though they focused on fixing the PPA and the HW Utilization issues and bigger caches.
I still don't believe any leak this site post's

It's just naming play. There's no guarantee Xe3->Xe3P is greater than Xe2->Xe3. The latter gains are already significant. I would tell you for most people their worst non-flopped node was 22nm. Cause it brought nothing to desktops, and a mediocre gain on laptops. Details don't matter, if it doesn't result in gains.

 

[511]

It's just naming play. There's no guarantee Xe3->Xe3P is greater than Xe2->Xe3. The latter gains are already significant. I would tell you for most people their worst non-flopped node was 22nm. Cause it brought nothing to desktops, and a mediocre gain on laptops. Details don't matter, if it doesn't result in gains.

Even though brought nothing to desktops it was the first FinFet node in HVM before anyone else by a decent time and it had PPA Improvements you can't blame the design on node

 

[eek2121]

I agree that Larrabbee was a failure.

I am in camp “Intel could have made Larrabbee work.” Not only that, it would’ve been revolutionary.

Note that there are a few folks trying this with RISC-V.

 

[regen1]

I am in camp “Intel could have made Larrabbee work.” Not only that, it would’ve been revolutionary.

Yeah. It might not have mattered much even if the initial version(s) possibly won't have done that well. It could have set them in path of compute which traditionally they had not gone that big into.

Will also quote Tom Forsyth's old post on it already quoted before below:

I am just going to post this excellent blog from Tom Forsyth about why Larrabee didn't fail nearly as bad as people think it did...
https://tomforsyth1000.github.io/blog.wiki.html#%5B%5BWhy%20didn't%20Larrabee%20fail%3F%5D%5D

 

[DavidC1]

Even though brought nothing to desktops it was the first FinFet node in HVM before anyone else by a decent time and it had PPA Improvements you can't blame the design on node

I don't blame the node. It's just that 22nm was a nothingburger. CPUs are essentially a blackbox. Only the results matter.

 

[OneEng2]

Rumor seems to be that higher end NVL will be N2 with the lower power parts being 18A. Maybe 18A isn't ready for high power?

I am guessing BSPDN in general, is not a high power node. Great for PPA at a little lower clock speed, but for all-out performance with a few cores? I think it will always have issues compared to just GAA.

No, N2p is just a much faster node.

See above. GAA without BSPDN "is just a much faster node" IMO.

18A might well shine in DC though.

 

[adroc_thurston]

GAA without BSPDN "is just a much faster node" IMO.

No, backside power doesn't impact anything.
N2p is just a much faster node.

18A might well shine in DC though.

Lmao

 

[Thunder 57]

I don't blame the node. It's just that 22nm was a nothingburger. CPUs are essentially a blackbox. Only the results matter.

IIRC Intel said FinFET did more for 22nm than any shrink itself did. It worked well in laptops I believe. And it lowered desktop TDP from 95W to 77W with a small clock increase. I don't see how more dies/wafer that use less power and give a small boost in performance is a "nothingburger".

I am guessing BSPDN in general, is not a high power node. Great for PPA at a little lower clock speed, but for all-out performance with a few cores? I think it will always have issues compared to just GAA.

See above. GAA without BSPDN "is just a much faster node" IMO.

18A might well shine in DC though.

I don't know enough about BSPD but maybe it is similar to what happened with FinFET, great at low power/efficiency initally, TBD for performance.

 

[OneEng2]

No, backside power doesn't impact anything.

Actually, it impacts nearly EVERYTHING which is what makes it so difficult to figure out on net effect.

Can you explain how you think it doesn't impact "anything"? Seems like engineering non-sense to me.

 

[Magio]

Beyond it being pretty weird IMO to downplay 18A for "just" being a 3 nm class node. A few years ago Intel barely even had a 7nm "competitor" while TSMC was rolling out N4P, and now Intel shipping a process that's at worst roughly on par with N3P, TSMC's best production node today, is bad because N2/P coming up shortly after are probably better?

First to BSPDN isn't nothing, early adoption of High NA isn't nothing. I feel like we're in a reverse situation of the early 2010s when TSMC was getting some technical wins that people brushed off because "Intel nodes are still better, who cares" but building experience with the technologies that would make up the future of chipmaking is exactly how TSMC came to leapfrog Intel and while I don't think TSMC will fuck up as badly and allow themselves to be ridiculed, Intel now being at the forefront of certain things is a good sign for the future.