Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[DavidC1]

I'm starting to get Pat's strategy now. Perhaps he's saying "you get this amount of time to develop, and launch it", since he's not directly responsible for developing it. And the leadership is responsible for doing whatever needed to release it within that time period, and they'll straighten up themselves to do better. And it comes with what's called Grovian discipline and consequences if the product doesn't end up doing well - you might get demoted or fired.

In some ways it makes sense, because the problem with the original 10nm was(in addition to simply bad management), that it tried to do too many. Foveros, density gains, COAG.

If 10nm was little worse, but got it out in 2017, then while missing the original projections, it still would have been a progress. Rather than a risky 20%, you get a stable 15% instead. And any delays keep adding up. What was supposed to be an October launch becomes November, and then December, and that becomes true for ten generations after, making the problem worse and worse.

One MLID video was talking about how Pat was prioritizing TTM over more radical gains. Because a steady march can overtake you, if you try to do so much and then end up stumbling. Reddit guys were saying Royal Core v1.0 wasn't that impressive compared to both P and E cores. They said v2.0 looked much better, but do you take a risk on that radical project or do something better like future E cores?

 

[Hulk]

Intel is starting to become the "It's coming!" machine.

Intel announces Arrow Lake fix coming within a month — Robert Hallock confirms poor gaming performance is due to optimization issues

A fix is on the way.

www.tomshardware.com

 

[desrever]

Intel is starting to become the "It's coming!" machine.

Intel announces Arrow Lake fix coming within a month — Robert Hallock confirms poor gaming performance is due to optimization issues

A fix is on the way.

www.tomshardware.com

"It's coming" might work if they weren't this far behind but being 30% behind the 9800x3D means nobody expects them to gain enough to bridge the gap.

Their best case is that they slightly beat RPL in gaming after they fix everything and beat the 9950x in productivity but even these things I doubt.

 

[Hulk]

"It's coming" might work if they weren't this far behind but being 30% behind the 9800x3D means nobody expects them to gain enough to bridge the gap.

Their best case is that they slightly beat RPL in gaming after they fix everything and beat the 9950x in productivity but even these things I doubt.

No really, forget about 20A, the fix is coming!

 

[DavidC1]

Their best case is that they slightly beat RPL in gaming after they fix everything and beat the 9950x in productivity but even these things I doubt.

Their best case is getting back to slide numbers of being "approximately equal" to 14900K.

 

[Markfw]

No really, forget about 20A, the fix is coming!

"the fix is coming" might be Intels cute marketing phrase.

But this is why I will not buy Intel until they get their head out of their @@$$#^#^ !!

 

[alcoholbob]

"It's coming" might work if they weren't this far behind but being 30% behind the 9800x3D means nobody expects them to gain enough to bridge the gap.

Their best case is that they slightly beat RPL in gaming after they fix everything and beat the 9950x in productivity but even these things I doubt.

That's even more optimistic than Intel. Even Robert Hallock is saying ideally these fixes will bring performance to what they originally wanted to present, which was rough parity with the 14900K. That means they are aiming for 6-7% perf improvement in games as a best case scenario, but even within 3% is their definition of "parity."

 

[511]

David Huang isn't doing tests himself though. Lot of them he gathers from elsewhere like X.

I think they can manage 30% with Arctic Wolf alone.

Raicu also says 25-30% over skymont so it is definitely possible the P core team meanwhile is in shambles

 

[511]

"the fix is coming" might be Intels cute marketing phrase.

But this is why I will not buy Intel until they get their head out of their @@$$#^#^ !!

Amd also had multiple fixes for Zen5 as well both the vendors are pulling same stuff 🤣

 

[511]

I'm starting to get Pat's strategy now. Perhaps he's saying "you get this amount of time to develop, and launch it", since he's not directly responsible for developing it. And the leadership is responsible for doing whatever needed to release it within that time period, and they'll straighten up themselves to do better. And it comes with what's called Grovian discipline and consequences if the product doesn't end up doing well - you might get demoted or fired.

Yes also he makes sure they get the funding and it is your responsibility to ensure results he is doing his part but there won't be another Andy Grove that dude was on another level.
I have heard from people in the 80s when he was moving buisness away from memories he simply went to the guy in charge and that guy said no he fired him on the spot 🤣 and the next guy out of fear said Yes

In some ways it makes sense, because the problem with the original 10nm was(in addition to simply bad management), that it tried to do too many. Foveros, density gains, COAG.

COAG was one of the reason for 10nm all along. Intel said Cobalt is difficult to work with while it has lower resistance than copper at smaller geometries they switched to Cu with TaN barrier in Intel 4/3

 

[511]

That's only part of the equation, though, for example, M4 P cores use higher performance libraries, less dense, so that's transistor budget that could've been used to increase IPC instead if dense libraries would've been used.

They are using Finflex so it is a perk of the nodes that they used it is not regular fin like 2-2/3-3

 

[DavidC1]

That's even more optimistic than Intel. Even Robert Hallock is saying ideally these fixes will bring performance to what they originally wanted to present, which was rough parity with the 14900K. That means they are aiming for 6-7% perf improvement in games as a best case scenario, but even within 3% is their definition of "parity."

If they can get 6-7% without changing the frequency of the fabric, then users can go in and change such settings and boost it further, and it'll look much better than today.

Tomshardware summarized as only needing tuneups and certain random BIOS setting combinations make it perform bad or something?

I have heard from people in the 80s when he was moving buisness away from memories he simply went to the guy in charge and that guy said no he fired him on the spot 🤣 and the next guy out of fear said Yes

Andy Grove wasn't alone in doing this. He had Gordon Moore and Robert Noyce. This assumes he was infallible, and he was not. Firing randomly just because he disagrees with you will also cause problems down the road(such as the countless security issue in all aspects of computing today).

 

[511]

Apparently Hallock was asked how did they improved productivity performance in Cinebench/Blackmagic etc he said by removing SMT LMAO should have said our E cores are better and P cores are S###

 

[cannedlake240]

Raicu also says 25-30% over skymont so it is definitely possible the P core team meanwhile is in shambles

How will scheduling work then if E cores end up matching P core in ST lol, it'll just be big.BIG instead of big.LITTLE. Not having actual little cores cores isn't a good idea though even Qualcomm who was initially all big cores is switching to heterogeneous in 8 elite adding a 4wide Oryon M for maximum battery life

 

[DavidC1]

How will scheduling work then if E cores end up matching P core in ST lol, it'll just be big.BIG instead of big.LITTLE. Not having actual little cores cores isn't a good idea though even Qualcomm who was initially all big cores is switching to heterogeneous in 8 elite adding a 4wide Oryon M for maximum battery life

The next P core is supposedly ~8% faster while the successor is 10-12% faster. So they'll perform roughly equal per clock(7%/8%/11%), with the P cores having clock speed advantage.

Size-wise the E core should still be 1:3 in ratio. The E core is already only about 7-10% behind and it works so another reduction of 5-10% gap won't make a huge difference. Skymont in Lunarlake is still pretty efficient at the range it's playing at.

But in the Arctic Wolf generation, it'll really drive the point home the P core design is dead.

Scheduling will work EVEN better because the differences between the cores are less.

 

[Markfw]

Amd also had multiple fixes for Zen5 as well both the vendors are pulling same stuff 🤣

well, I bought one of the first Zen 5. No issues, no bios or microcode fixes, no performance problems.... vs.

Multiple of all of those problems.

See a difference ?? Thats all I have to say..

 

[SiliconFly]

.

 

[gdansk]

AMD started the trend with Zen 5!

Not really. It was Intel with Alder Lake. Or AMD with multiple CCX designs. Or Intel with HyperThreading. Hardware/software interactions impacting gaming performance has a long history - especially in OS schedulers.

 

[naukkis]

Scheduling will work EVEN better because the differences between the cores are less.

Sure. Slow cores in hybrid designs just handicaps system performance and responsivity. Optimal configuration is when using max mt every core is equal speed - and with lower threads power budget allows boosting those cores to higher clocks. SMT really is not option there as it just split those fast threads to more slower ones making optimal scheluding impossible. Alderlake did get it pretty ok because little cores were so weak that max mt situation were equal strength cores because SMT thread of big core was as fast as e-core. With Arrowlake that ain't happening so axing SMT was pretty much only option left.

 

[511]

Andy Grove wasn't alone in doing this. He had Gordon Moore and Robert Noyce. This assumes he was infallible, and he was not. Firing randomly just because he disagrees with you will also cause problems down the road(such as the countless security issue in all aspects of computing today).

Yes you always need someone but no one is infallible. I am pretty sure he knows better than the people on the form to how to run a company 🙂

 

[511]

well, I bought one of the first Zen 5. No issues, no bios or microcode fixes, no performance problems.... vs.

Multiple of all of those problems.

See a difference ?? Thats all I have to say..

Did you buy 285K ?

 

[511]

Not really. It was Intel with Alder Lake. Or AMD with multiple CCX designs. Or Intel with HyperThreading. Hardware/software interactions impacting gaming performance has a long history - especially in OS schedulers.

This trend will not stop as the hw keeps getting complex

 

[gdansk]

This trend will not stop as the hw keeps getting complex

I dread to know how much more complex we can get than energy aware, non-uniform memory access aware, symmetric multi-threading aware, heterogenous core aware, latency-prioritized fair scheduling...

I just know it's going to be AI scheduling

 

[jpiniero]

Intel is starting to become the "It's coming!" machine.

Intel announces Arrow Lake fix coming within a month — Robert Hallock confirms poor gaming performance is due to optimization issues

A fix is on the way.

www.tomshardware.com

This is something that's supposed to have been done before you launch it???

I wonder if it's the same jokers who's job it was to do the Raptor Lake validation.

 

[511]

I dread to know how much more complex we can get than energy aware, non-uniform memory access aware, symmetric multi-threading aware, heterogenous core aware, latency-prioritized fair scheduling...

I just know it's going to be AI scheduling

We already have ML AI scheduling in thread director i would say Meteor Lake is the pinnacle of complexity in designing and scheduling till date in CPUs.
Regarding how much more only time will tell