Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

Page 441 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

Tigerick

Senior member
Apr 1, 2022
851
802
106
Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






PPT1.jpg
PPT2.jpg
PPT3.jpg



As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



LNL-MX.png
 

Attachments

  • PantherLake.png
    PantherLake.png
    283.5 KB · Views: 24,030
  • LNL.png
    LNL.png
    881.8 KB · Views: 25,524
  • INTEL-CORE-100-ULTRA-METEOR-LAKE-OFFCIAL-SLIDE-2.jpg
    INTEL-CORE-100-ULTRA-METEOR-LAKE-OFFCIAL-SLIDE-2.jpg
    181.4 KB · Views: 72,432
  • Clockspeed.png
    Clockspeed.png
    611.8 KB · Views: 72,319
Last edited:

Hulk

Diamond Member
Oct 9, 1999
5,141
3,734
136
Yes, but you were replying to a post about a future scenario
Yes, but I specified on the current node.

If you want to talk about future products on future nodes then feel free to create any magical part you want.

Eventually though, reality asserts itself and the reality is that the hybrid solution is proving to me more amenable to MT scaling. AMD can go to 24 cores with another chiplet and Intel can go 40 cores by adding small (very small) Skymont clusters.
 

511

Diamond Member
Jul 12, 2024
4,575
4,201
106
Intel themselves admit that compared to the predecessor, it has 18% perf/w gain at the lower clocks but gets to only little over 10% at the peak. It's because TSMC process has a steeper curve that benefits low power chips. They optimized it for low power on the 22nm process but after the backlash on Ivy Bridge, they must have changed it for 14nm and future process generations again.
The performance curve takes IPC on consideration as well Intel 4 vs N3B is way close than people think so it's not apples to apples for node
 

majord

Senior member
Jul 26, 2015
509
711
136
Yes, but I specified on the current node.

If you want to talk about future products on future nodes then feel free to create any magical part you want.

Eventually though, reality asserts itself and the reality is that the hybrid solution is proving to me more amenable to MT scaling. AMD can go to 24 cores with another chiplet and Intel can go 40 cores by adding small (very small) Skymont clusters.
They both have options up their sleeve in theory.. AMD also has 5c to fill out higher MT if die space and power is a concern, It would be interesting in a future time to compare them in more detail. Preferably on same node.

Need both core sizes, clock ceilings, perf/watt and clock comparisons, but as it is based on rough data it would appear you'd need around 1.4-1.5 more Skymont cores than Zen 5 cores (with Zen 5 operating at similar frequencies ) , and around 1.2x Zen 5c (both at max clock speeds) to match throughput
 

cebri1

Senior member
Jun 13, 2019
373
405
136
I don't think so N3B to N3E is a different design so they have to port it over it will be RPL refresh like scenario
Keep in mind there is a 20A version of Arrow Lake. If I'm not mistaken, after 10nm fiasco, they tried to make their chips as node agnostic as possible.
 
  • Like
Reactions: 511

511

Diamond Member
Jul 12, 2024
4,575
4,201
106
View attachment 106099

The 9950X is running @ DDR5-7200 while ARL is at 6400 MT/s.

This one is against a 9950X @ 6200 MT/s: https://browser.geekbench.com/v6/cpu/compare/7425534?baseline=7465273

View attachment 106102

So a tuned 9950X isn't that far behind ARL in ST INT tests and obliterates it in MT INT.

Arrow Lake gonna need higher speed RAM, at least 8400 MT/s.
Tuned ARL is going to better than 9950X outside of AVX-512 if we assume this run was JEDEC 🙂
 
  • Like
Reactions: SiliconFly

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
View attachment 106099

The 9950X is running @ DDR5-7200 while ARL is at 6400 MT/s.

This one is against a 9950X @ 6200 MT/s: https://browser.geekbench.com/v6/cpu/compare/7425534?baseline=7465273

View attachment 106102

So a tuned 9950X isn't that far behind ARL in ST INT tests and obliterates it in MT INT.

Arrow Lake gonna need higher speed RAM, at least 8400 MT/s.
How is it that in Object detection, in the second exemple, ARL ST score is 3221 and 14791 in MT, wich is a poor scaling, but then the 9950X score 3704 in ST and curiously only 13503 in MT despite starting from a 15% higher ST core than ARL..?

Does this part of the bench actually scale better with some hidden money.?.

Because in MT there s apparently only 5-6 cores that are used, so how the lower performing part could scale that much better while being 13% slower in ST, that s just too weird to give any credit to GB for this number, that look tricked more than anything else.
 
Last edited:

Nothingness

Diamond Member
Jul 3, 2013
3,301
2,374
136
How is it that in Object detection, in the second exemple, ARL ST score is 3221 and 14791 in MT, wich is a poor scaling, but then the 9950X score 3704 in ST and curiously only 13503 in MT despite starting from a 15% higher ST core than ARL..?

Does this part of the bench actually scale better with some hidden money.?.
Rather than a stupid conspiracy theory, what about exercising some criticital thinking process? What about: perhaps 9950X memory scaling is just poor. Or SMT doesn't play well on that test.
 

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
Rather than a stupid conspiracy theory, what about exercising some criticital thinking process? What about: perhaps 9950X memory scaling is just poor. Or SMT doesn't play well on that test.
It could be if more cores would be put to use, that s why i said that there s only 5-6 cores/5-6 threads used in MT, but seems that you didnt notice the reason why i made the precision, there s no way that 5-6 cores using each a single thread could saturate the bandwith.

Edit : The ST score is the same whatever the RAM speed, and the MT score is lower with the faster RAM, so that s yet another prove that RAM speed is not of importance here, but since there s only 5-6 threads used in MT that s not even worth to be mentioned.

Edit 2 : There s other such discrepancies where there s few threads used MT and yet the lower performing part in ST end up getting better scores in MT, we can see it clearly on some FP tests that involve FI only 8 threads in MT.
 
Last edited:

Tup3x

Golden Member
Dec 31, 2016
1,273
1,406
136
Rather than a stupid conspiracy theory, what about exercising some criticital thinking process? What about: perhaps 9950X memory scaling is just poor. Or SMT doesn't play well on that test.
No no no, if AMD is losing, clearly bribery is involved (at very least conspiracy or non-partial test). There's no other explanation and Arrow Lake can't possibly beat Zen 5 in any test. If it does it will use 100 W more power.
 

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
No no no, if AMD is losing, clearly bribery is involved (at very least conspiracy or non-partial test). There's no other explanation and Arrow Lake can't possibly beat Zen 5 in any test. If it does it will use 100 W more power.

I base my sayings in numbers while you re left using deffamation if not willfull ignorance or eventually both since i said what are these numbers, but here they are with proportionality respected :

If CPU A score 100 in ST and CPU B score 115 then how is it possible that when using only 6 threads in MT CPU A end being 10% faster..?..
 
Jul 27, 2020
28,107
19,174
146
Edit 2 : There s other such discrepancies where there s few threads used MT and yet the lower performing part in ST end up getting better scores in MT, we can see it clearly on some FP tests that involve FI only 8 threads in MT.
Photo filter? That could just be the Skymont cores boosting MT throughput.
 

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
Photo filter? That could just be the Skymont cores boosting MT throughput.

I noticed this one too but there s also only 5 or eventually 6 threads used in MT, so that s the same case as Object detection, the lower ST performing part end being faster with the 5-6 threads and hence 5-6 cores used in MT, wich would be totaly impossible in any bench that is deserving this name.

The only explanation would be that ARL is dispatched 5-6 threads in as much cores, since it doesnt have SMT, while Zen 5 is dispatched the 5-6 threads in 4 cores with two cores using SMT, but whatever the reason this expose blatlantly GB 6 as being a doubtfull bench, either badly designed or worse, tricked.
 
Last edited:

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
Where are the mods? Can you take your VS arguments elsewhere?

Someone posted ARL s subscores in GB 6, compared them to Zen 5 and i said that those sub scores do not make sense and i subtancied why.

So what are you complaining about.?.

Actually it s you who s off topic.
 

cebri1

Senior member
Jun 13, 2019
373
405
136
Someone posted ARL s subscores in GB 6, compared them to Zen 5 and i said that those sub scores do not make sense and i subtancied why.

So what are you complaining about.?.

Actually it s you who s off topic.
It’s very simple actually, you have questions about Zen5 scores you take that discussion to the Zen5 thread. Read the forum rules if you have more questions.
 
  • Like
Reactions: DAPUNISHER

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
Another one is that ARL scales better in MT workloads, at least in GB6.

We ll see once ARL is launched since there will be scores of submissions at GB and ll get some averages like for the 9950X, in the meantime all we have is a reduced set of measurements, at this point we ll know if it s GB that is the issue.

As for a difference between the MT scores of Zen 4 vs Zen 5 this shouldnt have an infuence in MT scores since those ones are scaled out of ST scores, if a CPU does worse in ST Integer it will be also worse in MT INT when only a handfull of threads are used since bandwith is not an issue with a low thread count.
 

Abwx

Lifer
Apr 2, 2011
11,885
4,873
136
It’s very simple actually, you have questions about Zen5 scores you take that discussion to the Zen5 thread. Read the forum rules if you have more questions.
The point was to compare ARL s scaling in GB 6 to Zen 5 scaling in GB 6, and the comparative numbers were brought in this thread.

Is that difficult to understand.?..