Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+0+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[adroc_thurston]

Looks to me like we're finally going to get a chip optimized for low power. I wonder how much of this is influenced by the TSMC node.

Kinda a lot, N3 derivatives are gucci at low power specifically.

 

[controlflow]

I would suggest watching the High Yield video. Skymont looks like an absolute beast. It looks like you can still fit 3x Skymonts in the area of a single Lion Cove.

Shame that so much of the die is eaten up by this new NPU. I would have preferred to rather spend that die area on another 4 Skymonts and making the iGPU a bit bigger but the AI NPU wars cannot be stopped at this point.

When Intel starts spamming these new Skymonts (or future mont cores) in huge numbers, it should lead to some ridiculous MT performance and PPW.

Seriously? This thread is getting way ahead of itself. I thought I saw leaks that Zen 5 will have similar clocks, and dont forget ARL is giving up hyperthreading, so the E cores better be really good. ARL will still have to have a really good IPC increase for the P cores to beat Zen 5.

LNL's implementation of LNC will not have HT but HT versions of LNC absolutely do exist. It isn't yet known if ARL has HT or not.

 

[Gideon]

We need the mont team to save x64.

To me it seems more and more likely that Intel future big cores might be an evolution of the little ones (at least in client)

E g. Some day they will make a big-little core of the Mont architecture

 

[jur]

Does anyone else thinks that 15% IPC gain of Lion Cove is quite poor given all the changes in the core? They beefed up every part of the core, separated int and float, scalar int mul throughput is up 3x, new cache structure,.. Sounds almost like Intel is sandbagging and the gains in some benchmarks should be much larger.

 

[controlflow]

Lunar Lake vs. Meteor - Lion Cove performance uplift over Redwood Cove drops to around 10% near the end of the power curve. Against Raptor Cove it would a bit lower still, not at the same power though. The main benefits are at lower clocks, where we get 18%+ performance, Raptor Cove would probably look silly here.

Looks to me like we're finally going to get a chip optimized for low power. I wonder how much of this is influenced by the TSMC node.

View attachment 100441

Keep in mind that +14% IPC is LNC in LNL vs Redwood Cove. LNC in Arrow Lake would likely have higher IPC due to larger L2 and shared L3 caches.

 

[H433x0n]

I would suggest watching the High Yield video. Skymont looks like an absolute beast. It looks like you can still fit 3x Skymonts in the area of a single Lion Cove

Just found out the 14% IPC was for Lion Cove in LNL with 2.5mb of L3$. Apparently the Lion Cove in ARL-S is a bit different 3mb of L3$ + larger L2$ and also has the HT portion of the core present.

So it’s still possible for Lion Cove to gain a bit more performance per core.

 

[adroc_thurston]

Apparently the Lion Cove in ARL-S is a bit different 3mb of L3$ + larger L2$ and also has the HT portion of the core present.

No, it's 2.5M L2 for LNL and 3M for ARL.
L3 is 3 megs per core for both.

 

[coercitiv]

Keep in mind that +14% IPC is LNC in LNL vs Redwood Cove. LNC in Arrow Lake would likely have higher IPC due to larger L2 and shared L3 caches.

I don't know how much more clear I could have made it that I was talking about LNC in LNL and RC in MTL.

 

[inf64]

Just found out the 14% IPC was for Lion Cove in LNL with 2.5mb of L3$. Apparently the Lion Cove in ARL-S is a bit different 3mb of L3$ + larger L2$ and also has the HT portion of the core present.

So it’s still possible for Lion Cove to gain a bit more performance per core.

Keep in mind that they compare it to RWC and not Raptor Cove (RWC has ~2-3% lower IPC vs Raptor Cove). I find the IPC jump to be very weak for P core and very strong for E core.

 

[SolidQ]

I find the IPC jump to be very weak for P core and very strong for E core.

That is from twit

 

[controlflow]

I don't know how much more clear I could have made it that I was talking about LNC in LNL and RC in MTL.

Your post also explicitly compares that LNC in LNL to Raptor Cove...

Given the bigger differences in P core implementations across different products than in the past, these differences in IPCs are worth pointing out.

 

[inf64]

That is from twit

So we are supposed to believe that integer IPC difference between the E core and P core in LNL is just 12%. That is ridiculous given the size difference and resource allocation.

 

[del42sa]

Intel comparing new E-cores to the LP-E cores (the ones on the SoC with no L3), rather than the main E-cores on Meteor lake

 

[coercitiv]

Your post also explicitly compares that LNC in LNL to Raptor Cove...

Raptor Cove in mobile CPUs. What made you think I was switching to desktop parts on the fly and without mentioning it?

 

[controlflow]

Intel comparing new E-cores to the LP-E cores (the ones on the SoC with no L3), rather than the main E-cores on Meteor lake

There is good reason for that. The E cores on LNL don't sit on the ring bus with the P cores and are on a different PMIC. They are essentially the new LP E cores and on the "low power island".

 

[lightisgood]

So we are supposed to believe that integer IPC difference between the E core and P core in LNL is just 12%. That is ridiculous given the size difference and resource allocation.

I guess that Lion Cove is able to run >1.15x clock speed over the Skymont.
So, Lion has >1.265x ST perf. than Sky...
Is this ridiculous ?

 

[coercitiv]

Intel comparing new E-cores to the LP-E cores (the ones on the SoC with no L3), rather than the main E-cores on Meteor lake

They have provided ample comparisons for both mobile and desktop implementations:

• on mobile they're comparing with LP-E cores because the Skymont cluster is taking over their role as well
• for the desktop, they provide an IPC comparison with Raptor Cove, in a simulation where they both have access to the same fabric and memory performance

 

[controlflow]

Raptor Cove in mobile CPUs. What made you think I was switching to desktop parts on the fly and without mentioning it?

I said nothing about desktops specifically, but it is irrelevant since mobile and desktop Raptor Cove are the same core.

Anyway, I think I made my point so probably no point continuing this.

 

[FlameTail]

Alder Lake-N successor with Skymont should be pretty strong

 

[ToTTenTranz]

From this slide LNL-MX iGPU seems to be easily faster than MTL-H iGPU at the same power.

It might be significantly faster and have better performance-per-watt than the bandwidth-squeezed Radeon 890M in Strix Point.

Intel put 8MB L2 on the new iGPU, which is 4x the L2 in the 780M 2/3rds the L2 in the RTX4050. It's a lot of L2 for a GPU that size.

 

[biostud]

Competition is good for us consumers, maybe AMD will move the launch of zen5 3D closer.

 

[mikk]

Video playback compared to Meteor Lake.

 

[invisible_city]

The atom core is good. But some Intel users might anyway decide to shut them down to gain better P core OC and compatibility in some situation.

And if you care atom core enough, you should have known E core IPC is already quite good, compare Gracemont to Goldencove is just 16% lower on INT, and 38% lower on FP due to less FPU resources.

Guess why Intel compare Skymont to LP Crestmont in Meteorlake which lacks L3 cache.

View attachment 100431

Gracemont is around skylake IPC. Skymont is around Raptor Cove IPC, which is a jump of around 20-50% (specint int 20%, fp 50%) AND gets a clock boost.

The reason Skymont was compared to LP E Cores was explained. It is comparing the old low power island in Meteor Lake to the new one in Lunar Lake.

Skymont in Arrow Lake was also compared to Raptor Cove and Raptor Lake at iso frequency. The attempt at dismissing Skymont performance is amusing.

Edit : Spec

 

[invisible_city]

Keep in mind that +14% IPC is LNC in LNL vs Redwood Cove. LNC in Arrow Lake would likely have higher IPC due to larger L2 and shared L3 caches.

Yeah 14% is Lunar Lake P-Core vs Meteor Lake P-Core not Lion Cove vs RWC

 

[inf64]

Gracemont is around skylake IPC. Skymont is around Raptor above IPC, which is a jump of around 50% AND gets a clock boost.

The reason Skymont was compared to LP E Cores was explained. It is comparing the old low power island in Meteor Lake to the new one in Lunar Lake.

Skymont in Arrow Lake was also compared to Raptor Cove and Raptor Lake at iso frequency. The attempt at dismissing Skymont performance is amusing.

Skymont INT performance is great, but as far as FP goes I think it's roughly half throughput vs Raptor Cove (AVX256 needs to be split in 2 ops to execute on its FP units?).