Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[Philste]

Not 3D (except for the X3D variants which are based on a very primitive form of 3D tech thats no where near Intel foveros).

You have no clue what you are talking about, right? X3D uses direct copper to copper bond, which is far more advanced than Intels Foveros with microbumps. Foveros Direct is Intels Counter for that, I think they said it's 2025 at best.

 

[Abwx]

10% above 14900k would make it 15-20% higher than Zen 4. that would still be competitive with Zen 5.

If these numbers were real only, but the 7950X is 2% above the 14900K.

Intel Core i9-14900K, i7-14700K & i5-14600K im Test: Anwendungs-Benchmarks

i9-14900K, i7-14700K & i5-14600K im Test: Anwendungs-Benchmarks / Testmethodik / Multi-Core-Leistung / Single-Core-Leistung

www.computerbase.de

 

[msj10]

If these numbers were real only, but the 7950X is 2% above the 14900K.

Intel Core i9-14900K, i7-14700K & i5-14600K im Test: Anwendungs-Benchmarks

i9-14900K, i7-14700K & i5-14600K im Test: Anwendungs-Benchmarks / Testmethodik / Multi-Core-Leistung / Single-Core-Leistung

www.computerbase.de

isn't it obvious that I am talking about ST here?

 

[H433x0n]

10% above 14900k would make it 15-20% higher than Zen 4. that would still be competitive with Zen 5.

Because I was bored I did some digging just to get a good idea of what Zen 5 would have to do to break even. I took existing scores for 13900KS / 14900K in popular 1T benchmarks and then extrapolated ARL-S performance in same benchmarks using the old data from IgorsLab.

1T Performance RPL v Zen 4-
GeekBench5 (source: TheVerge):
2235 / 2099 = +6%
CB23 (Source TPU):
2339 / 2051 = +14%
JetStream (Source TPU):
307825 / 290422 = +6%
Speedometer (Source TPU):
364 / 327 = +11%
WebXprt (Source TPU):
334 / 293 = +14%

Below is what is required to break even with ARL-S (using IgorsLab old projections)
Geekbench 5: +13-16%
Speedometer: +19-22%
WebXprt: +19-21%

Below is what is required to break even with the more recent ARL-S updated perf estimates (increased 1T perf by ~3-4%)
Geekbench 5: +16-20%
Speedometer: +22-26%
WebXprt: +22-26%

Edit: Finding reliable Geekbench data is difficult since it can vary by +/- 10% depending on configuration.

 

[SiliconFly]

You have no clue what you are talking about, right? X3D uses direct copper to copper bond, which is far more advanced than Intels Foveros with microbumps. Foveros Direct is Intels Counter for that, I think they said it's 2025 at best.

First off, you're ignoring the most important thing. Most of the AMD CPU's including Zen5 aren't X3D, they're just 2.5D tech. Whereas, all upcoming Intel CPUs are 3D.

 

[Saylick]

First off, you're ignoring the most important thing. Most of the AMD CPU's including Zen5 aren't X3D, they're just 2.5D tech. Whereas, all upcoming Intel CPUs are 3D.

I still fail to see why 3D advanced packaging is going to be the deciding factor like you suggest it is. Some products simply don't need 3D packaging to be viable or successful. Intel tooting from the highest rooftops about IFS and their alleged packaging prowess is because they know that they were caught on the backfoot against TSMC.

Also, I'm not sure how this statement:

Not accurate. Intel is the current market leader in 3D packaging tech with foveros. TSMC has 3D packaging tech, but not many customers. For example, AMD CPUs are 2.5D. Not 3D (except for the X3D variants which are based on a very primitive form of 3D tech thats no where near Intel foveros).

.. jives with this statement:

First off, you're ignoring the most important thing. Most of the AMD CPU's including Zen5 aren't X3D, they're just 2.5D tech. Whereas, all upcoming Intel CPUs are 3D.

How can one claim that Intel is the current leader in 3D packaging when you also acknowledge that the parts that use 3D packaging aren't even out yet?

 

[adroc_thurston]

they're just 2.5D tech

No they aren't.
The only client 2.5d parts AMD currently ships is N31/32, these are InFO-R.

Whereas, all upcoming Intel CPUs are 3D.

no they're basic ass 2.5D with eMiM. Equivalent to 2020 TSM CoWoS.
Intel shipped real 3d(tm) with Lakefield and PVC, both are trainwreck products.

 

[DavidC1]

We are back in times, it is all due to IFS incapable of making monolithic SoC.

The fault would be due to design, not IFS.

Intel wasn't known for top notch designs. Even the much vaunted Core 2 was in mid-2006 and was trumped pretty quickly after introduction of the iPhone in 2009. Their talking point was all about perf/watt blah blah and while it was an improvement it wasn't enough.

Sandy Bridge was impressive comparatively but only competition was against faltering AMD. I wonder what would have happened if the x86 license was opened up and there were many competitors instead? What if just Nvidia was one of them?

Up until 10nm it was process that made up for the design team's deficiency. The failure of process exposed the deep problem within the organization, hence why we see failures as we do now.

@H433x0n Since the Igor's lab leak is a legitimate slide, one wonders why Arrowlake would perform noticeably better. The only other reason is if they purposely put out that slide to misdirect speculation.

They did on Raptorlake by claiming "single digit improvements". I remember a heated debate on that one. Doesn't mean that history will be necessarily repeated as Meteorlake fell short of official claims.

 

[H433x0n]

@H433x0n Since the Igor's lab leak is a legitimate slide, one wonders why Arrowlake would perform noticeably better. The only other reason is if they purposely put out that slide to misdirect speculation.

They did on Raptorlake by claiming "single digit improvements". I remember a heated debate on that one. Doesn't mean that history will be necessarily repeated as Meteorlake fell short of official claims.

I’m not assuming that ARL-S will perform noticeably better. I’m taking the data at face value. That 2nd estimate is based on more recent estimates from Intel that boosted 1T perf by 3-4% from higher fmax. I personally doubt it performs noticeably better than the data they’re providing their partners.

I put together all that data to make a point that even if Zen 5 lives up to all of the hype and gets a +30% IPC increase with no frequency regression that still would only result in them having a 1T perf lead that’s roughly equivalent to what RPL has over Zen 4 now. As far as I know the narrative online isn’t that Zen 4 is DOA because it’s behind by 10% in some 1T metrics - nobody really cares.

 

[uzzi38]

6P+8E on 20A is the bulk of their volume!

Note: 6P+8E for mobile is on N3. Desktop is a different story.

That is not the bulk of volume, mobile is a far larger market than desktop is and it's not even close.

 

[jpiniero]

Note: 6P+8E for mobile is on N3. Desktop is a different story.

That is not the bulk of volume, mobile is a far larger market than desktop is and it's not even close.

I have a feeling it will end up being Raptor Lake Refresh Refresh instead of any theoretical 20A Arrow Lake, even though that makes for some oddities given the different socket.

 

[Elfear]

Because I was bored I did some digging just to get a good idea of what Zen 5 would have to do to break even. I took existing scores for 13900KS / 14900K in popular 1T benchmarks and then extrapolated ARL-S performance in same benchmarks using the old data from IgorsLab.

1T Performance RPL v Zen 4-
GeekBench5 (source: TheVerge):
2235 / 2099 = +6%
CB23 (Source TPU):
2339 / 2051 = +14%
JetStream (Source TPU):
307825 / 290422 = +6%
Speedometer (Source TPU):
364 / 327 = +11%
WebXprt (Source TPU):
334 / 293 = +14%

Below is what is required to break even with ARL-S (using IgorsLab old projections)
Geekbench 5: +13-16%
Speedometer: +19-22%
WebXprt: +19-21%

Below is what is required to break even with the more recent ARL-S updated perf estimates (increased 1T perf by ~3-4%)
Geekbench 5: +16-20%
Speedometer: +22-26%
WebXprt: +22-26%

Edit: Finding reliable Geekbench data is difficult since it can vary by +/- 10% depending on configuration.

For what it's worth, the SPEC delta isn't that big so, depending on your use case, ARL-S may have to bring more to the table than you're estimating.

1T Performance RPL v Zen 4
(source Anandtech)

SPECint2017 : +2.8% (on average over 10 sub-tests)
SPECfp2017: +5.6% (on average over 12 sub-tests)

 

[SiliconFly]

No they aren't.
The only client 2.5d parts AMD currently ships is N31/32, these are InFO-R.

no they're basic ass 2.5D with eMiM. Equivalent to 2020 TSM CoWoS.
Intel shipped real 3d(tm) with Lakefield and PVC, both are trainwreck products.

Nope. Starting MTL (and ARL), it's basic ass 3D stacking with foveros & advanced NOC interconnect.

Zen chiplets are directly mounted on the substrate & connected using infinity fabric... outdated.

Zen5 uses the same old tech like Zen4 and has some serious catching up to do in packaging tech.

 

[SiliconFly]

I still fail to see why 3D advanced packaging is going to be the deciding factor like you suggest it is. Some products simply don't need 3D packaging to be viable or successful. Intel tooting from the highest rooftops about IFS and their alleged packaging prowess is because they know that they were caught on the backfoot against TSMC.

Chiplets and 3D packaging like foveros are the future. Old tech like monolithic and 2.5D like Zen are just passé. Although, leaks suggest Zen6 will be full 3D.

How can one claim that Intel is the current leader in 3D packaging when you also acknowledge that the parts that use 3D packaging aren't even out yet?

MTL is chiplets, foveros & NOC.

 

[Glo.]

Chiplets and 3D packaging like foveros are the future. Old tech like monolithic and 2.5D like Zen are just passé. Although, leaks suggest Zen6 will be full 3D.


MTL is chiplets, foveros & NOC.

Intel has bigger problem than which packaging technology is bigg... I mean, better.

 

[Hitman928]

Chiplets and 3D packaging like foveros are the future. Old tech like monolithic and 2.5D like Zen are just passé. Although, leaks suggest Zen6 will be full 3D.


MTL is chiplets, foveros & NOC.

What packaging tech does MTL have that MI300 doesn't because MI300 has packaging tech that MTL doesn't. . .

 

[gdansk]

It's weird seeing CPUs with a base (at TDP?) frequency of 700MHz on Intel Ark.

Or wait there's also the 164U with 400MHz.

 

[Hitman928]

It's weird seeing CPUs with a base (at TDP?) frequency of 700MHz on Intel Ark.

Or wait there's also the 164U with 400MHz.

That's just the LPE cores, but yeah, many (12) cores and a 9W base TDP leads to very low base clock frequencies.

 

[adroc_thurston]

Starting MTL (and ARL), it's basic ass 3D stacking with foveros & advanced NOC interconnect.

It's a passive 2.5d slab.
With eMiMs.

Zen5 uses the same old tech like Zen4 and has some serious catching up to do in packaging tech.

What is strix-halo

 

[gdansk]

That's just the LPE cores, but yeah, many (12) cores and a 9W base TDP leads to very low base clock frequencies.

Perhaps it doesn't matter but looking at similar last-generation Alder Lake U at 9W the regular E core also dropped 100MHz base frequency. And the P cores stay at 1100MHz. Really seems like no real efficiency improvement at ultra low power levels (-100 MHz * 8 E cores is effectively equal to the +400MHz * 2 LP-E cores).

Very low power is where I was hoping MTL would be better. But maybe there's a reason that chip is as-of-yet missing.

 

[SiliconFly]

What packaging tech does MTL have that MI300 doesn't because MI300 has packaging tech that MTL doesn't. . .

Lets refocus. Zen5 is gonna use the same old 2.5D tech with infinity fabric like previous gens. Whereas, ARL is gonna be foveros 3D with advanced NOC interconnect fabric.

Meaning, if LNC delivers on performance and/or efficiency. it can take on Zen5 very easily. Now the fate of ARL squarely rests on LNC and LNC alone.

 

[SiliconFly]

It's a passive 2.5d slab.
With eMiMs.

What is strix-halo

Foveros is 3D.

Youtube link.

 

[adroc_thurston]

Foveros is 3D.

Youtube link.

Only in LKF and PVC.

 

[Hitman928]

Lets refocus. Zen5 is gonna use the same old 2.5D tech with infinity fabric like previous gens. Whereas, ARL is gonna be foveros 3D with advanced NOC interconnect fabric.

Meaning, if LNC delivers on performance and/or efficiency. it can take on Zen5 very easily. Now the fate of ARL squarely rests on LNC and LNC alone.

Yes, MTL and ARL use more advanced packaging than Zen 4 or Zen 5 desktop (excluding the 3D cache variants which use more advanced packaging than what Intel currently has to offer). That's different than your original statement but if this was the point you were trying to make then, o.k. We'll see how much it actually helps them fairly soon.

 

[H433x0n]

I don’t get the hype over the packaging. There’s a high probability that the packaging will be the cause for ARL-S having poor gaming performance.

Chiplets, tiles, whatever you want to call it is always a compromise solution in client products. It’s not a feature or impressive tech - it’s there to save money at the expense of a worse product.