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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

Senior member
Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

Intel Raptor Lake UIntel Wildcat Lake 15WIntel Lunar LakeIntel Panther Lake 4+0+4
Launch DateQ1-2024Q2-2026Q3-2024Q1-2026
ModelIntel 150UIntel Core 7 360Core Ultra 7 268VCore Ultra 7 365
Dies2223
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6Intel 18-A + Intel 3 + TSMC N6
CPU2 P-core + 8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-cores4 P-core + 4 LP E-cores
Threads12688
Max Clock5.4 GHz4.8 GHz5 GHz4.8 GHz
L3 Cache12 MB6 MB12 MB12 MB
TDP15 - 55 W15 - 35 W17 - 37 W25 - 55 W
Memory128-bit LPDDR5-520064-bit LPDDR5x-7467128-bit LPDDR5x-8533128-bit LPDDR5x-7467
Size96 GB48 GB32 GB128 GB
Bandwidth83 GB/s60 GB/s136 GB/s120 GB/s
GPUIntel GraphicsIntel GraphicsArc 140VIntel Graphics
RTNoNoYESYES
EU / Xe96 EU2 Xe8 Xe4 Xe
Max Clock1.3 GHz2.6 GHz2 GHz2.5 GHz
NPUGNA 3.017 TOPS48 TOPS49 TOPS






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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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You keep using the term Golden Cove. It's not. Intel slides say different.

That's because I consider Raptor Cove to be a slight refresh of Golden Cove. Yes, technically the cores are different and there's a 1-3% difference in terms of IPC, but it's minimal.

Shifting nodes during a refresh is unlikely afaik.

Intel did that with their Tick-Tock model for years to reduce the risks. Also, I don't think Intel is excited to pay TSMC to produce chips when they will have their good node 🙂
 
Honestly, if Skymont is Raptor Cove from an IPC point of view, I don't see a lot of applications on the desktop that could use 8+32 (over 8+16) outside of CB benchmarking and DC. With Raptor Lake once all of the Raptor Cove physical threads are occupied there is a significant drop in performance on the Gracemont threads. We're looking at a nearly 50% IPC improvement from Gracemont to Skymont. It's massive.

If Lion Cove is +14% over Raptor Cove and can do 5.4GHz all-core and Skymont is delivered as promised Intel will be fine with ARL. More than fine actually. It looks like Intel and AMD have the tech, they just have to deliver it in a timely manner.
 
Honestly, if Skymont is Raptor Cove from an IPC point of view, I don't see a lot of applications on the desktop that could use 8+32 (over 8+16) outside of CB benchmarking and DC. With Raptor Lake once all of the Raptor Cove physical threads are occupied there is a significant drop in performance on the Gracemont threads. We're looking at a nearly 50% IPC improvement from Gracemont to Skymont. It's massive.

If Lion Cove is +14% over Raptor Cove and can do 5.4GHz all-core and Skymont is delivered as promised Intel will be fine with ARL. More than fine actually. It looks like Intel and AMD have the tech, they just have to deliver it in a timely manner.
Napkin math using 5.5GHz nT and 4.6 Ghz nT for LNC and SKMT suggests a ~20% uplift over RPL for INT workloads.
 
Honestly, if Skymont is Raptor Cove from an IPC point of view, I don't see a lot of applications on the desktop that could use 8+32 (over 8+16) outside of CB benchmarking and DC. With Raptor Lake once all of the Raptor Cove physical threads are occupied there is a significant drop in performance on the Gracemont threads. We're looking at a nearly 50% IPC improvement from Gracemont to Skymont. It's massive.

If Lion Cove is +14% over Raptor Cove and can do 5.4GHz all-core and Skymont is delivered as promised Intel will be fine with ARL. More than fine actually. It looks like Intel and AMD have the tech, they just have to deliver it in a timely manner.
If they get the power and thermals under control, an 8+32 might appeal to the low end workstation market. Especially if they can put it into a Mac Studio type box that is portable and quiet, but with enough power for say video, editors, and audio engineers, as well as others who could use that kind of oomph in an easy to move device.

Put in a 5080 GPU with the easy option of lower clocks so it also doesn’t need fans blasting, it will appeal to some.
 
That napkin math is with SMT enabled on LNC or not?
Not enabled. I don't think we are getting SMT on ARL either...
If they get the power and thermals under control, an 8+32 might appeal to the low end workstation market. Especially if they can put it into a Mac Studio type box that is portable and quiet, but with enough power for say video, editors, and audio engineers, as well as others who could use that kind of oomph in an easy to move device.

Put in a 5080 GPU with the easy option of lower clocks so it also doesn’t need fans blasting, it will appeal to some.
Power, mem bandwidth, and sheer die size and cost all start becoming bigger and bigger issues...
 
Actually, there were no good leaks regarding ARL-R 8+32 being cancelled. I still think it's a possibility.
Based on @Hitman928's chip area calculations, Skymont is ~40-50% the size of Lion Cove. So an 8+32 would be like 21-24 P-cores on one chip area-wise. Is that feasible? It would certainly be a MT monster.
 
6+24 would be only slightly larger area-wise than 8+16 and deliver nearly the same ST performance a a significant boost in MT now that the E's are so performant.
 
6+24 would be only slightly larger area-wise than 8+16 and deliver nearly the same ST performance a a significant boost in MT now that the E's are so performant.
I've been calling for that 6+24 solution for many years. One example:
...I think Intel is missing out on a potential multithreaded monster: 6 P cores, 24 E cores. Instead they went with 8 P Cores and 16 E cores. Both would use about the same amount of power and about the same amount of silicon area. But 6+24 would blow these away in multi-threaded applications.
 
6+24 would be only slightly larger area-wise than 8+16 and deliver nearly the same ST performance a a significant boost in MT now that the E's are so performant.

Well wouldn't it be just as performant single thread as doesn't single thread mean only 1 core? Or does single thread also mean more than 1 core, but limited amount beyond 1 core for SMT?
 
Come on guys!!! Please don't give Intel any more ideas on how to span E cores. I could see 8+24, perhaps for (uggh) ARL-R, but I really would hate to see them delete P cores in order to include more E cores.
More performance, less power. Why wouldn't you want that. Unless you fall into the false belief that you want P cores for things like gaming.
 
More performance, less power. Why wouldn't you want that. Unless you fall into the false belief that you want P cores for things like gaming.

Well more performant lower power P cores so no hybrid scheduling quirks and yes better for gaming for sure.

Maybe the e-cores become the new P cores anyways if the Austin team, is really doing that well and Israel design center is not sometime in a couple or few years???
 
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