Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[AMDK11]

You are giving too much credit to ALU increase. Zen 5 has 50% more ALU units (4 to 6) and gets "only" ~16% IPC according to AMD's number (the only one we have so far). If it were that easy to simply slap on ALU/AGUs or execution ports and get "free" IPC, everyone would have a field day. It's super complicated dance of resources and power and has 100s of variables. It's basically a tradeoff every time.

I deliberately used simplification. I just wanted to emphasize that the profits often do not even reach 50% of the amount of resources added.

 

[Henry swagger]

Intel Arrow Lake-S, Arrow Lake-HX 24-Core & Arrow Lake-H 16-Core CPUs Spotted With Much Higher Base Clocks

More Intel Arrow Lake CPU samples have been spotted in S, HX, & H flavors with higher base clocks than Raptor Lake chips.

wccftech.com

Core ultra 9 have higher base clock than 14900k.. wonder which node N3B or 20A ?🤔

 

[lightisgood]

Intel Arrow Lake-S, Arrow Lake-HX 24-Core & Arrow Lake-H 16-Core CPUs Spotted With Much Higher Base Clocks

More Intel Arrow Lake CPU samples have been spotted in S, HX, & H flavors with higher base clocks than Raptor Lake chips.

wccftech.com

Core ultra 9 have higher base clock than 14900k.. wonder which node N3B or 20A ?🤔

Is it maybe Intel 3...?

 

[poke01]

Core ultra 9 have higher base clock than 14900k.. wonder which node N3B or 20A ?🤔

Rumoured to be N3B

 

[SiliconFly]

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[SiliconFly]

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[Henry swagger]

Final nail in the coffin. So, we now have confirmation ARL-S desktop 8+16 has no HT anymore.

Thanks to Intel for getting rid of useless/issue prone HT in client!

I think ultra 9 will have higher all core boost than 14900k.. oc to 6ghz maybe ? So lion cove 25% to 35% over raptor cove 🤔😀 ?

 

[eek2121]

Final nail in the coffin. So, we now have confirmation ARL-S desktop 8+16 has no HT anymore.

Thanks to Intel for getting rid of useless/issue prone HT in client!

It is an ES, not the shipping product. They could simply have it disabled in microcode or even via the BIOS.

 

[SiliconFly]

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[ondma]

ARL-S is rumored to be on N3B and ARL-H on 20A. Both nodes should be able to clock high enough if necessary as N3B is more mature now and 20A has BSPD.

Interesting times ahead... competition will be neck-to-neck on ST & will be a total wipe-out on 8+16 MT.

How do you figure ARL will "wipe out" 9950 in MT? Lets do some speculative math. Assume Lion cove and 9xxx big cores are equal if both have hyperthreading. I think this should be a fairly accurate guess. 9950x has 16 "big cores" all with HT.
ARL has 8 big cores without HT so assuming 25% gain from HT, that is equivalent to 6 AMD cores.
ARL has 16 E cores. They lack hyperthreading and will have a clock speed disadvantage as well. So in "equivalent" AMD cores, that is 16*.75(no HT)*.85(clockspeed disadvantage) = 10.2. So we have 6+10 AMD core equivalents. MT performance should be about equal at best, because I am not even considering the the E cores will have an IPC deficit as well against AMD big cores.

 

[Hulk]

How do you figure ARL will "wipe out" 9950 in MT? Lets do some speculative math. Assume Lion cove and 9xxx big cores are equal if both have hyperthreading. I think this should be a fairly accurate guess. 9950x has 16 "big cores" all with HT.
ARL has 8 big cores without HT so assuming 25% gain from HT, that is equivalent to 6 AMD cores.
ARL has 16 E cores. They lack hyperthreading and will have a clock speed disadvantage as well. So in "equivalent" AMD cores, that is 16*.75(no HT)*.85(clockspeed disadvantage) = 10.2. So we have 6+10 AMD core equivalents. MT performance should be about equal at best, because I am not even considering the the E cores will have an IPC deficit as well against AMD big cores.

What all-core speed does the 16 core Zen 4 run at?

 

[Markfw]

What all-core speed does the 16 core Zen 4 run at?

Depending on the load, this is about the slowest. Oh, and this is configured for 80% of stock as far as wattage and temp.

Most likely about 5 ghz, stock or more.

 

[coercitiv]

What all-core speed does the 16 core Zen 4 run at?

Use 5Ghz for napkin math.

 

[Markfw]

View attachment 101746

Use 5Ghz for napkin math.

About 5.2 ghz, I was close. Mine is on air, and as I said at 80% of stock on temp and power.

to be exact, 122 watts for mine in the chart above.

 

[ondma]

What all-core speed does the 16 core Zen 4 run at?

For both Lion Cove and Zen 5 I have seen estimates of 5.7 turbo, so I assumed 5.5 all core (for both Lion Cove and Zen 5) and 4.5 all core for Skymont. This actually gives a ratio of 0.82, but I fudged a bit and gave Skymont a ratio of 0.85. Obviously, all these are just guesses, since we have neither product in final retail form. As I said also, I fudged in favor of Intel by assuming Skymont has equal IPC to Zen 5.

Point is, I dont see how anyone can by any stretch of the imagination think ARL without hyperthreading will decisively beat Zen 5 in multithreaded. It will come down to what clock speed each can maintain, and which architecture the benchmark favors. Best case for Intel I see is trading blows depending on the benchmark. As impressive at it appears to be, an E core is still far away in performance from a full fledged big core with HT.

Despite the claimed advantages of removing HT, I feel strongly that it will hurt them in the end. It is bad enough in the high end with 16 E cores, but will be even worse in the lower tiers. Previously I7 and i5 lines had an advantage over AMD because the extra E cores gave Intel an advantage in MT workloads against the equivalent AMD 76xx and 78xx chips. Now that advantage will be largely negated because the E cores will be needed to just make up for the lack of HT. If LC had been able to achieve 25 or 30 percent IPC gain, I could see how one would want to remove HT. But the IPC gain appears by all leaks, and preliminary LL data to be equal or slightly less than for previous Intel new generations which did not give up HT. So it just seems like a loss to me, with no corresponding gain except maybe easier validation and less security vulnerabilities, although AMD still seems to make it work.

 

[SiliconFly]

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[coercitiv]

Your math is wrong.

Check yours again, Skymont does not have LNC PPC.

 

[SiliconFly]

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[coercitiv]

Ok. Scale it down further. But also adjust for HT. You'll see no way a 16 core HT cpu will stand against a 24 core cpu.

You were debating the napkin math of another poster, do the math again and show your results. (or point out the mistake in the other poster's napkin exercise)

Finishing your reply with "you'll see no way" sounds more like faith and less like fact.

 

[SiliconFly]

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[Philste]

I took the newest clock numbers for ARL QS and came out at a 5% lead for ARL. Looks like it will be ZEN4 vs RPL again. Performance in ST and MT basically the same (probably slight lead for Intel in both, but nothing to worry). Efficiency will see a clearer winner and in this regard my personal guess is that the roles will switch. Intels node jump is just too big. That's for vannilla ZEN5. 3D will bring gaming parity again and will be the most efficient too because of it's low clocks, but Intel will be way closer than before.

 

[coercitiv]

Despite the claimed advantages of removing HT, I feel strongly that it will hurt them in the end. It is bad enough in the high end with 16 E cores, but will be even worse in the lower tiers. Previously I7 and i5 lines had an advantage over AMD because the extra E cores gave Intel an advantage in MT workloads against the equivalent AMD 76xx and 78xx chips.

While I generally agree with your take on flagship vs. flagship MT performance, when it comes to i7 and especially the the i5, Intel will have the better offering. The only problem is RPL already has the better i5 over Zen 4 and that does not stop AMD from selling the R5 in particular. The halo effect from the flagships gaming CPU and the somewhat bad rep of the E cores (as in not great for games) make people chose the 6P product from AMD even when Intel has a better all-rounder in the form of 13500 for example.

None of these are facts. I think HT barely provides 15% to 20% performance delta in reality. So, if you adjust for that, it still comes down to same. No more magical numbers based on napkin math. It stops.

According to Intel the HT performance gains is 1.3x, that's pretty close to the 0.75 factor used by @ondma in his napkin math.

Spoiler

 

[AcrosTinus]

I took the newest clock numbers for ARL QS and came out at a 5% lead for ARL. Looks like it will be ZEN4 vs RPL again. Performance in ST and MT basically the same (probably slight lead for Intel in both, but nothing to worry). Efficiency will see a clearer winner and in this regard my personal guess is that the rules will switch. Intels node jump is just too big. That's for vannilla ZEN5. 3D will bring gaming parity again and will be the most efficient too because of it's low clocks, but Intel will be way closer than before.

which is a healthy back and forth. On the basis of pure speculation, I believe that we haven't seen the real performance of Lion Cove yet. Weren't the benchmarks of the LNC core based on a trimmed version with less cache for Lunar Lake. I'll wait and see..

 

[Klingenberg]

I can see big advancements in consumer choices in the coming years with a big boost in efficiency, and for sure it will lean in favor of Intel. I don't know, they seem like they are one step further in technology

 

[SiliconFly]

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