Nvidia is getting a custom DMR ... Like Hyperscalers get don't know what exactly they get.
Coral Has SMT
Ask IBM 🤣
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Discussion Intel current and future Lakes & Rapids thread
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itsmydamnation
Diamond Member
Revex Vs Capex. Especially for non IT businesses whose profit centres are not directly linked to their IT spend.
itsmydamnation
Diamond Member
yeah red money vs blue money ...... your not allowed to make purple money.
DrMrLordX
Lifer
1P 16ch Diamond Rapids?!?!?
You are getting 4 Sockets with DMR so a total of 64 DIMMS with 256GB Kit you are looking at 16TB RAM
DrMrLordX
Lifer
@QuickyDuck was speculating about 1P systems. Of course we now know (or at least reasonably conclude) that 1P Diamond Rapids isn't happening.
1P DMR is happening cause why not
What's wrong with that?
Definitely better to have 1 x 16 memory channels than 2 x 8 channels.
DrMrLordX
Lifer
Well then I'll welcome my 1P 16ch overlords. Seems like overkill for a 1P setup. Plus as has already been mentioned/implied, it will not be cheap and will be a niche within a niche, e.g. the main shipping volume of Diamond Rapids should have been 1P/2P 8ch systems that seem to have been cancelled altogether.
When you have 192+ Cores you kind of need that bandwidth and they might want to upsell a 192C/12Channel Platform instead of 8+
Having two DIMMs per channel is pointless when you have MRDIMM and LRDIMM that can deliver all 8 ranks that a single channel maxes out at in a single DIMM, so you don't lose capacity and with MRDIMM you also double bandwidth.
Nothing requires you to fill all 16 slots/channels so you can get the same as an 8 channel system if that's all you need. Yeah I suppose Intel will charge more for the 16 channel CPUs than they did for the 8 channel, but they always offer some gimped SKUs at lower prices so I could see them offering ones that are gimped to only 8 or 12 channels down the road.
The difference between DDR4 and 5 is now several generations of performance difference on LGA 1700. Anyone that kept their DDR4 when upgrading, or chose it because DDR5 speeds and prices were unsavory at the time, is sometimes being held back with even a low end mid tier GPU.
Intel Xeon 6: P-cores vs E-cores for CPU Rendering
Intel's Xeon 6 server processors come in P-core and E-core variants, so we test two similarly priced models to see which is better for a CPU rendering node.
www.pugetsystems.com
For DMR-SP, I guess top configs were 144 cores(3*48 core tiles) changed to 96 cores(2*48) and a 64 core config?
Though not sure if there were any later changes and a possible 128 core(2*64 ?).
Hopefully RRF(Arctic Wolf E-Cores based Server line) doesn't get cancelled or delayed. If they could get their fabric and other stuff right it could be decent and much more versatile(performance and Instructions support) than SRF.
Uhh about that it has been renamed to DMR-HDIntel Xeon 6: P-cores vs E-cores for CPU Rendering
Intel's Xeon 6 server processors come in P-core and E-core variants, so we test two similarly priced models to see which is better for a CPU rendering node.
For DMR-SP, I guess top configs were 144 cores(3*48 core tiles) changed to 96 cores(2*48) and a 64 core config?
Though not sure if there were any later changes and a possible 128 core(2*64 ?).
Hopefully RRF(Arctic Wolf E-Cores based Server line) doesn't get cancelled or delayed. If they could get their fabric and other stuff right it could be decent and much more versatile(performance and Instructions support) than SRF.
Yup maybe they don't want the forest line marketing name 🤣🤣
How does it make sense that they won't be competitive in performance on the low end, but will be on the higher end?
Only explanation I have is that per-core perf might be much stronger with Zen 6 than DMR, and in lower end skus where the boosts are also typically higher, you can really push that advantage, unlike in higher core count skus where you get limited by power-per-core much faster.
A little bit worryingly though, those lower end skus are also typically where the AI headnode skus are coming from. You don't need 192 or 256 cores for an AI headnode.
Only explanation I have is that per-core perf might be much stronger with Zen 6 than DMR, and in lower end skus where the boosts are also typically higher, you can really push that advantage, unlike in higher core count skus where you get limited by power-per-core much faster.
A little bit worryingly though, those lower end skus are also typically where the AI headnode skus are coming from. You don't need 192 or 256 cores for an AI headnode.
I was wondering what the demand is on the CPU in these AI nodes.
Since NVidia contracted Intel for high core count DMR and AMD is going to be using 256 core Venice in the Helios racks, I would think that you do need high core count CPU.
Interesting slide presented at FAD:
I think it's just for NV-Link
Has AMD confirmed they will be using the highest core count config of Venice though in their AI racks?
I'm basing my reasoning on Nvidia's current custom Intel sku only going up to what, 86? cores and 8 mem channels despite GNR maxing at 128. They also explicitly list high boost clocks as one of the optimizations made for that sku.
Prices and therefore margins are MUCH lower relative to SoC production cost on the low end.
The 2000$ SKUs aren't all that much cheaper to make than the 12K SKUs.
They probably expect Zen6 to be superior in PPW, max clocks, and thanks to SMT in terms of threads/MT perf per core as well.
Basically, in the high-end, margins are probably high enough Intel can stay somewhat competitive through price, without killing their margins entirely.
On the low end, margins already aren't that high, so there's just not enough margin headroom to compete against AMD entirely through competitive pricing.
I was not able to confirm that from the published slides, but I think that is the assumption
NVidia is using 2 Intel CPUs (Emerald Rapids) with 56 cores each for total of 112 cores.
I don't know if any specs for NVidia box with DMR have been released, but since DMR is cancelling low end configuration, it is a safe bet that NVidia will use the highest core count version.
Also, AMD is going with single Venice Zen 6 CPU per node, which to me suggests it will be the 256 core CPU.
BTW, as far as GNR, I don't think NVidia is using it currently in their reference designs. But 3rd parties can.
As far as Vera Rubin based boxes, don't know if it was announced which x86 CPU Intel will use, but most likely GNR. It would be too risky to bet on DMR.
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