Discussion Intel current and future Lakes & Rapids thread

[lightisgood]

At 253W RPL is 2% ahead of the competition at 142W, and is below even if pushed at 300W if the latter is at around 200W.

These were good players for whom had no knowledge of the real numbers and was relying on Intel s marketing instead, i guess that urban legends helped a lot to forge this kind of "opinion"...

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I have no marketing experience. Also I have no interest in it.
In the fact, ADL&RPL brought regaining market share in some country (e.g. Japan) to Intel as 250W SKU.
So I simply consider ADL&RPL were good player and had better competitiveness (c.f. Rocket Lake).

IMO, when we think about competitiveness, we should see things in from a broad perspective, but not in from the details.

 

[igor_kavinski]

In your dreams zen 5 crush arrow lake

I suppose that dream becoming reality would be YOUR nightmare

 

[Abwx]

I have no marketing experience. Also I have no interest in it.
In the fact, ADL&RPL brought regaining market share in some country (e.g. Japan) to Intel as 250W SKU.
So I simply consider ADL&RPL were good player and had better competitiveness (c.f. Rocket Lake).

IMO, when we think about competitiveness, we should see things in from a broad perspective, but not in from the details.

Sure that it isnt as disastrous as RKL, but that s not what one would call real competitivness.

If the tables were turned and AMD was that lacking in perf/watt we could count on Intel marketing and afficionados to yell it from the roofs and put perf/watt as the first metric instead of pure perfs.

Indeed Intel state theirs CPUs as being 125W TDP parts, implying that 250W is only for short burst while we know that it s their true rated TDP, but that works apparently since most people are unaware of the real numbers.

 

[lightisgood]

Sure that it isnt as disastrous as RKL, but that s not what one would call real competitivness.

If the tables were turned and AMD was that lacking in perf/watt we could count on Intel marketing and afficionados to yell it from the roofs and put perf/watt as the first metric instead of pure perfs.

Indeed Intel state theirs CPUs as being 125W TDP parts, implying that 250W is only for short burst while we know that it s their true rated TDP, but that works apparently since most people are unaware of the real numbers.

Good insight.
To make a long story short, PR/branding/other marketing resources constitute a part of product’s competitivness.

 

[H433x0n]

If the tables were turned and AMD was that lacking in perf/watt we could count on Intel marketing and afficionados to yell it from the roofs and put perf/watt as the first metric instead of pure perfs.

What aficionados? There is not a single voice here that is pro-Intel. None of the discord servers or subreddits that I frequent could be classified as pro-Intel either. If the roles were reversed, the internet would be concerned with pure performance regardless of efficiency. I see people pairing a 7800X3D and a 7900 XTX all of the time and then boasting about the efficiency of their CPU despite the fact that their choice in GPU offsets it.

The past 2 generations the mantra has been all about power efficiency, core area and the chiplet packaging. All of which are a performance hindrance for a client desktop platform and is configured this way as a consequence of targeting data center and hyperscaler clients. The desktop parts would have decisively outperformed RPL in raw performance if they didn’t have these constraints and were designed from scratch targeting client.

Edit: Thinking about this more, the internet hates Nvidia’s Ada Lovelace cards for the same reason they favor Ryzen. The Ada Lovelace line is class leading with its incredible area and power efficiency. They also are very good at re-using their gaming / enthusiast dies for revenue in workstation / data center. Nvidia’s big margins and silicon efficiency makes their cards hated and considered a bad value / rip-off to enthusiasts. Yet these same principles makes Ryzen great and consumers are happy to contribute to AMD’s big margins.

 

[Exist50]

Of course not, but reportedly Intel's first stepping often can't even boot.

I would be very surprised if Intel couldn't even boot client A-step silicon. I could see the need for a quick metal stepping, but we have poor visibility into those, and you can even do them inline if you're quick about it.

Intel client chips seem to be averaging around 3 steppings for anything decently complex. ADL took that many, and MTL is on C step as well, iirc. Though tough to say these days without a per-die breakdown, and without knowing the fab situation. Though even RPL took two steppings, which is just embarrassing. AMD, Nvidia, and Apple all regularly ship on A-step.

This one keeps bothering me. Pat said: "Arrow Lake is currently running its first stepping in the fab".

Didn't he also say something about it being in the lab? The way things sound to me, Intel likely has N3 wafers back, but 20A wafers are still WIP.

Intel, by treating their design teams as an external partner, would reduce this problem by forcing the design team to have less steppings overall, starting with ARL/LNL.

I doubt that accounting change impacts ARL/LNL. Not unless they kept it hidden from investors for at least a year.

 

[Exist50]

As @Doug S pointed out, for a long time Intel had the luxury of running the silicon through as often as they wanted to. They also kept tweaking things (like the famous 'G0' Q6600) - that's allot of steppings.

How many steppings was that? Intel doesn't always start from A.

 

[Thunder 57]

In your dreams zen 5 crush arrow lake

Right, because IIRC according to you Intel will hit 7GHz soon. Ha and 10GHz not to far away.

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[igor_kavinski]

Though even RPL took two steppings, which is just embarrassing. AMD, Nvidia, and Apple all regularly ship on A-step.

I would do that too if I had my own fabs. What's the fun of having them if you can't experiment? The real embarrassment was SPR.

 

[Exist50]

GitHub repo leaks point to it being Xe LPG+ so I imagine it’s some variation/beefed up alchemist

There were rumors about an "Alchemist+" dGPU at some point. Maybe the IP will still exist in ARL. I am curious about the reason, though. Would presume it be schedule related, but ARL doesn't seem like it's coming particularly early either.

Lunar Lake will probably have it, and that is where the integrated graphics matter more.

The drop in GPU competitiveness in the P/H segment will hurt them. Probably won't be as bad as reusing gen12.0 for yet another year, but it's not a good look for a company trying to be taken seriously in graphics.

Of course, they could make up for the lack of HT by adding more e cores, but that doesnt appear to be happening either.

4+4 seems like a pretty good setup for a low TDP chip. That's what Apple uses, after all. And unfortunately, AMD doesn't seem eager to compete in that thermal envelope.

Alder Lake and Raptor Lake were good player, however, they beat competitor at ~250W power consmption.
Without saying, 250W SKU is small and small market in the real world.

Especially, RPL relatively lacks competitiveness at ~35W power consmption, gpu computing and so on.
35W SKU is mainstream. So I consider MTL & ARL as hopeful successors.

Kinda odd comment. The lower to midrange ADL/RPL chips have widely been seen as the most competitive part of the lineup. It's at the high end vs AMD's dual CCD chips where they really need to push power to make up the gap.

Also, mainstream desktops are around 65W.

 

[adroc_thurston]

There were rumors about an "Alchemist+" dGPU at some point

That's the ACM-G12 aka the 256EU discrete part (in the new Arc Pro GPU and maybe somewhere else).
That's it.

And unfortunately, AMD doesn't seem eager to compete in that thermal envelope.

Meme segment and they've been burnt by MS there already.

but it's not a good look for a company trying to be taken seriously in graphics.

No one ever takes them seriously in graphics.

 

[Exist50]

I would do that too if I had my own fabs. What's the fun of having them if you can't experiment? The real embarrassment was SPR.

They're both embarrassing for Intel. SPR is just so bad that it single-handedly shifts the Overton window. At basically any other company, RPL would be an A-step PRQ, and SPR B-step, C at worst.

And that "experimentation" costs how many millions of dollars and months of development per tapeout? There's really no excuse for that poor quality, and I'd argue that Intel's future as a chip designer depends on fixing it.

 

[igor_kavinski]

I see people pairing a 7800X3D and a 7900 XTX all of the time and then boasting about the efficiency of their CPU despite the fact that their choice in GPU offsets it.

What's wrong with 7800X3D+7900 XTX? They are a match made in heaven and they don't melt!

The desktop parts would have decisively outperformed RPL in raw performance if they didn’t have these constraints and were designed from scratch targeting client.

They did try to do that with Zen 4. Almost ruined the efficiency with it clocked to the moon. Hope they never feel the need to do that again.

Nvidia’s big margins and silicon efficiency makes their cards hated and considered a bad value / rip-off to enthusiasts.

It's not their big margins. It's their anti-consumer pricing strategies. When they price their cards such that even people on a budget max out their credit cards to get the only card that makes financial sense (4090), it leaves little doubt that they prefer being evil and greedy, rather than making a good high volume mainstream card that the majority can afford. The 4080/4070 are not it and the 4060 is the worst ever x060 card ever.

 

[adroc_thurston]

It's their anti-consumer pricing strategies

Don't worry, AMD will be even worse once they fix their hweng issues.
Nvidia is a kind master; AMD is by far more cruel, see Turin pricing delta relative to Genoa, on 'mainstream' SKUs no less.

it leaves little doubt that they prefer being evil and greedy, rather than making a good high volume mainstream card that the majority can afford

Halo products drive brand image; they're an utmost necessity in client dGFX.

 

[H433x0n]

What's wrong with 7800X3D+7900 XTX? They are a match made in heaven and they don't melt!


They did try to do that with Zen 4. Almost ruined the efficiency with it clocked to the moon. Hope they never feel the need to do that again.

There’s nothing wrong with the 7800X3D nor is there anything nothing wrong with the 7900 XTX (in a vacuum). It’s the alleged concern over efficiency that falls apart once it’s paired with a GPU that will consume more power at idle (with multi-monitor high refresh) than their CPU could consume at full tilt. In less demanding games, the 4080 will consume 100W+ less power.

They did try to do that with Zen 4. Almost ruined the efficiency with it clocked to the moon. Hope they never feel the need to do that again.

No they didn’t. It’s Genoa clocked higher with a Ryzen sticker on the box.

it leaves little doubt that they prefer being evil and greedy, rather than making a good high volume mainstream card that the majority can afford

They’re both publicly traded corporations, neither are evil or greedy.

 

[lightisgood]

They're both embarrassing for Intel. SPR is just so bad that it single-handedly shifts the Overton window. At basically any other company, RPL would be an A-step PRQ, and SPR B-step, C at worst.

And that "experimentation" costs how many millions of dollars and months of development per tapeout? There's really no excuse for that poor quality, and I'd argue that Intel's future as a chip designer depends on fixing it.

Intel 10nm equips very complicated design rules.
10nm SF is more, Intel 7 is much more.
IMO, These puzzle rings came from IDM 1.0 policy.
I imagine that they shouted “Yes, we can!!” lol.

Not only Sapphire Rapids had been delay, but also Ice Lake-SP too.
Futhermore, 56-core Ice Lake-SP plan was cancelled.
I guess that Intel 10nm process gen are weak in at fabricating big chip.
In contrast, ICL/TGL/ADL/RPL were roughly on-track.

Anyway, it’s most important thing that Intel is returning to correct path with IDM 2.0 policy.

 

[Abwx]

What aficionados? There is not a single voice here that is pro-Intel. None of the discord servers or subreddits that I frequent could be classified as pro-Intel either. If the roles were reversed, the internet would be concerned with pure performance regardless of efficiency.

There were a lot by here at a time, and quite rabid ones, nut since Zen 1 was released they progressively left the field...

The past 2 generations the mantra has been all about power efficiency, core area and the chiplet packaging. All of which are a performance hindrance for a client desktop platform and is configured this way as a consequence of targeting data center and hyperscaler clients. The desktop parts would have decisively outperformed RPL in raw performance if they didn’t have these constraints and were designed from scratch targeting client.

Guess that Intel was no more used to give up the perf crown since the Athlon 64 days were over, that explain why they hugely increased the TDP of their chips, prior to RKL their typical max TDP was something like 95W with no boost.

Edit: Thinking about this more, the internet hates Nvidia’s Ada Lovelace cards for the same reason they favor Ryzen. The Ada Lovelace line is class leading with its incredible area and power efficiency. They also are very good at re-using their gaming / enthusiast dies for revenue in workstation / data center. Nvidia’s big margins and silicon efficiency makes their cards hated and considered a bad value / rip-off to enthusiasts. Yet these same principles makes Ryzen great and consumers are happy to contribute to AMD’s big margins.

Nvidia cards and AMD CPUs are not the same thing financiarly speaking, AMD s CPUs are competitivly priced against Intel ones even in absolute price, the 13900K was often more expensive than the 7950X despite a mediocre perf/watt rating.

 

[Abwx]

10nm SF is more, Intel 7 is much more.

Intel 7 is 10nm SF renamed.

 

[lightisgood]

Intel 7 is 10nm SF renamed.

AFAIK, Intel 7 equips novel metal stacks, UHP library and demands novel EDA tools.

 

[Exist50]

Intel 10nm equips very complicated design rules.
10nm SF is more, Intel 7 is much more.
IMO, These puzzle rings came from IDM 1.0 policy.
I imagine that they shouted “Yes, we can!!” lol.

Not only Sapphire Rapids had been delay, but also Ice Lake-SP too.
Futhermore, 56-core Ice Lake-SP plan was cancelled.
I guess that Intel 10nm process gen are weak in at fabricating big chip.
In contrast, ICL/TGL/ADL/RPL were roughly on-track.

Anyway, it’s most important thing that Intel is returning to correct path with IDM 2.0 policy.

They can't blame the node for everything. Tiger Lake took two steppings. Alder Lake took three. That's entirely on the design side, as would be most of SPR's trouble. And as we saw particularly with the latter, it creates huge delays. Imagine how different Intel's competitive position would be if everything was simply shifted 6 months earlier?

 

[Geddagod]

Futhermore, 56-core Ice Lake-SP plan was cancelled.

That was a thing? Idk I wasn't in the 'cpu hardware' scene back then so I genuinely don't know lol

 

[lightisgood]

That was a thing? Idk I wasn't in the 'cpu hardware' scene back then so I genuinely don't know lol

https://download.intel.com/newsroom/2021/archive/2019-08-06-news-next-generation-intel-xeon-scalable-processors-deliver-breakthrough-platform-performance-56-processor-cores.pdf

Cascade Lake-AP is too big and not able to fulfill being "standard socketed Intel Xeon Scalable processor".
So I think that Cooper Lake had retreated from 10nm to 14nm.
That is original Cooper Lake was a variant of Ice Lake-SP (= 56-core Ice Lake-SP plan, I wrote).

 

[Doug S]

How many steppings was that? Intel doesn't always start from A.

Pretty sure they always start at A. You just don't always hear about an 'A' because if it completely fails to function at all it is superceded in a couple weeks by B and so on.

 

[A///]

poor lads swaggered so hard he's continuously bumped his noggin into a concrete wall that has clearly affected his faculties.

 

[Exist50]

https://download.intel.com/newsroom/2021/archive/2019-08-06-news-next-generation-intel-xeon-scalable-processors-deliver-breakthrough-platform-performance-56-processor-cores.pdf

Cascade Lake-AP is too big and not able to fulfill being "standard socketed Intel Xeon Scalable processor".
So I think that Cooper Lake had retreated from 10nm to 14nm.
That is original Cooper Lake was a variant of Ice Lake-SP (= 56-core Ice Lake-SP plan, I wrote).

That's a stupid dual CPU package that no one ever used, except maybe one or two examples in HPC. Was just a way for Intel to advertise higher density. And, Cooper Lake is just another Skylake refresh, though I guess technically they added more UPI lanes.