Discussion Intel current and future Lakes & Rapids thread

[DrMrLordX]

And no designs have taped out on 20A when Intel isn't even shipping any Intel 4 or Intel 3 stuff yet LOL

Well technically they've done some test chips on 20a, I guess? But let's be real, it's nothing commercially-viable. Also spot on about Intel 4 which still hasn't shown itself in any meaningful fashion.

 

[Henry swagger]

Not at all. It's not marketing. Node comparison:

* Intel 7 is on par with TSMC 7nm (slightly better actually)
* Intel 4 is on par with TSMC 4nm (slightly better actually and comparable to TSMC 3nm in some aspects)
* Intel 20A is superior to TSMC 3mn (on par with upcoming TSMC 2nm)
* Intel 18A is superior to the upcoming TSMC 2nm

Intel's 20A is a pretty futuristic node. The first of it's kind actually! It uses GAAFET transistors (called RibbonFET) & Backside-Power-Delivery (BPD called PowerVia). TSMC is still developing these technologies and will release it with TSMC N2 only in 2026. Whereas, Intel 20A is already taped-out & ready to go.

20A has 15% PPW over Intel 3. And Intel 3 has 18% PPW over Intel 4. It's huge!! In short, Intel 20A has a whopping 36% PPW over Intel 4.

In other words, Arrow Lake will have a massive 63% PPW over the current Raptor Lake!!! These kinda numbers are not easy to even visualize! Its nothing short of a silver bullet for Arrow Lake. This makes ARL extremely power-efficient!

Just imagine a 250W 13900K running at just 90W with same performance! Thats the power of 20A. Not marketing at all.

And if they add the rumored ULP (ultra low-power) E-Core to ARL, its idle power consumption will be a new industry record for desktop class processors!!! (and laptop)

Well said 🏅

 

[Mopetar]

So Intel HEDT is finally back. But only for those that have super cheap electricity or steal it from their rich neighbors

The HE now stands for high electricity

It's unfortunate that these stupid thumbnails and click bait articles/tweets keep working for these youtubers, but that is where we are at I guess.

Long ago the media realized that engagement is higher for news articles that make people angry. These thumbnails are just a releflection of that because I can think of anything that would make me want to punch a person more.

 

[Markfw]

Well said 🏅

I don't know why its well, said, since it was already debunked as marketing hype that has a small chance to be even close to true.

Except you are Intel marketing, right ?

 

[Thunder 57]

Exactly my point too! It's all about PPA. Power, Performance & Density (area).

Time for AMD/TSMC fans to acknowledge that. Already I've heard a thousand stories saying TSMC is wow, Intel 4 is bad, Intel 20A is bad, TSMC 3nm is superior, Meteor Lake is finished, Zen 5 is light years ahead, etc. All I'm saying is it's time to set the record straight.

The Intel's +++++++ generations are already over. We're at the dawn of a new era in node and processor technologies.

Just imagine this, next year Q4, we're going to have a ton of CPUs built on 2nm & 3nm process nodes!

You hear what you want to hear. You've already proven yourself to be on the Intel bandwagon on another forum.

 

[semiman]

Nodes don't tape out. Test chips do. LOL.

Reading helps... see this link and this link.

The first link is about the tapeout in 20A. The second is about tapeout itself.

It's better than no tape-outs, but Intel's manufacturing track record makes this news less meaningful. Intel failed a lot due to an overly ambitious 10nm(which is 7nm now). They used new metal materials, new contact schemes(COAG)...etc and it failed. Intel 20A is quite ambitious as well since they introduce both new power delivery from the back of the wafer, new transistor geometry, and new packaging(if needed). Foundries are using more conservative approaches. Nanosheets first, mature them then goes to BPR...etc

It's interesting to see how Intel 20A and 18A evolve as time goes on. If it works, then Intel R&D must have been running quite well for a long time since they had mature pieces of technologies and needed a leader to tie them together.

I'm not gonna optimistic or pessimistic here. But at least now Intel's saying 'We are spending more than we earned!' instead of stockholders return...etc

 

[Geddagod]

It's better than no tape-outs, but Intel's manufacturing track record makes this news less meaningful. Intel failed a lot due to an overly ambitious 10nm(which is 7nm now). They used new metal materials, new contact schemes(COAG)...etc and it failed. Intel 20A is quite ambitious as well since they introduce both new power delivery from the back of the wafer, new transistor geometry, and new packaging(if needed). Foundries are using more conservative approaches. Nanosheets first, mature them then goes to BPR...etc

It's interesting to see how Intel 20A and 18A evolve as time goes on. If it works, then Intel R&D must have been running quite well for a long time since they had mature pieces of technologies and needed a leader to tie them together.

I'm not gonna optimistic or pessimistic here. But at least now Intel's saying 'We are spending more than we earned!' instead of stockholders return...etc

Backside power delivery is supposed to be tested on an internal Intel 3 node IIRC. And I don't mean internal as it's going to be used in GNR, I mean internal as in for testing purposes.

 

[A///]

Except you are Intel marketing, right ?

Intel wouldn't sink that low for a hire.

 

[A///]

Intel's failure was due to aggressive design practices and introducing too many new assets during the manufacturing process. In laymen's English this is biting off more than you can chew. Now that the wankers of past are gone, especially the dodgy office humper and numbers folk, there's an engineer in charge.

Pat "Gunslinger" Gelsinger has a lot of wrong he needs to right and it's going to be a slow moving ship. As long as he can pacify the Intel board into not ousting him before his work is done they'll be alright. It comes down to engineers knowing what to do for long term gain vs the morons who want short term gains. Gelsinger is on record stating Intel will take more conservative approaches to their designs and not go overboard. We shall see.

I'm not pro intel or amd, but I want to put my support in the "Gunslinger" because a dominant AMD is just as bad as a dominant Intel, but both companies at parity with one another like now minus power draw isn't great for customers either.

They need to go above and beyond each other with every release.

 

[Doug S]

Intel's failure was due to aggressive design practices and introducing too many new assets during the manufacturing process. In laymen's English this is biting off more than you can chew. Now that the wankers of past are gone, especially the dodgy office humper and numbers folk, there's an engineer in charge.

Biting off too much at once like backside power delivery and a new transistor type in the same node? Supposedly coming out only one year after their first commercial shipments of chips made using EUV (assuming those finally ship by the end of the year as now rumored?)

Intel has yet to prove their manufacturing division isn't still a giant clusterf***. Having an engineer in charge is great, but the guy at the top was hardly the only problem. The rot had obviously gone pretty deep given how long they've been fumbling the ball - and they are still doing so since we are seeing delays on Intel 4 chips (though I'm sure the apologists will claim that the new schedule was the plan all along, just like they kept claiming over and over again with 10nm)

Maybe TSMC is being too conservative introducing a new transistor type with almost no shrink, and phasing in stuff like the proper shrink and backside/buried power down the road, and that will allow Intel to catch up if they are able to maintain their claimed schedule. I can understand people who believe that Intel has a chance of doing that, if they like what they have been hearing about changes they've made and lessons learned in response to 10nm. But anyone who takes their schedule for 20A & 18A at face value without any skepticism is simply a fool.

 

[SiliconFly]

You hear what you want to hear. You've already proven yourself to be on the Intel bandwagon on another forum.

You're saying it as though it's a sin. I'm proud of it.

 

[SiliconFly]

I don't know why its well, said, since it was already debunked as marketing hype that has a small chance to be even close to true.

Except you are Intel marketing, right ?

Debunked by who? Some one imaginary?

Facts cannot be debunked because they're facts. Even aandtech, tomshardware & semiwiki have articles in this matter.

 

[Markfw]

Debunked by who? Some one imaginary?

Facts cannot be debunked because they're facts. Even aandtech, tomshardware & semiwiki have articles in this matter.

Those are what Intel says they are planning to do. It has nothing to do with reality, and the last 5 years or more have proven that. Facts are after it has happened, and these things are planned, but no proof they have happened. STOP saying they are facts, as thats a lie.

 

[A///]

Biting off too much at once like backside power delivery and a new transistor type in the same node? Supposedly coming out only one year after their first commercial shipments of chips made using EUV (assuming those finally ship by the end of the year as now rumored?)

Intel has yet to prove their manufacturing division isn't still a giant clusterf***. Having an engineer in charge is great, but the guy at the top was hardly the only problem. The rot had obviously gone pretty deep given how long they've been fumbling the ball - and they are still doing so since we are seeing delays on Intel 4 chips (though I'm sure the apologists will claim that the new schedule was the plan all along, just like they kept claiming over and over again with 10nm)

Maybe TSMC is being too conservative introducing a new transistor type with almost no shrink, and phasing in stuff like the proper shrink and backside/buried power down the road, and that will allow Intel to catch up if they are able to maintain their claimed schedule. I can understand people who believe that Intel has a chance of doing that, if they like what they have been hearing about changes they've made and lessons learned in response to 10nm. But anyone who takes their schedule for 20A & 18A at face value without any skepticism is simply a fool.

Intel's previous endeavors were far reaching than that. The inherent problem with Intel's goals then, many years ago, was a costs issue. Going back to the drawing board is always an expensive option but you could theoretically plow on, much like Kerzanich was "plowing ahead" and reduce your costs by way of not spending as much as going back to the drawing table. The kicker in that is you have no idea if you'll succeed or not. It doesn't help that Murthy had been going around laying off brain power. Intel trying to push conventional litho to the limits without wanting to adopt a new process. They were also aggressive in other areas that ultimately resulted in a lot of junked wafers.

Ultimately it comes down to density MTr/mm2 and how much each node can be pushed without peaking in power. If Raptor and Ryzen 7000 weren't 'super clocked" from the factory their power use would be much lower. Right now I can't say either company have a greater edge in performance in desktop. AMD wins in pure power usage. Intel's new workstation platform is a power hog but it delivers good performance. It's AMD's move. AMD's new lineup in mobile is gunning for Intel's throat. Intel's answer in datacenter is marginal at best. Sapphire Rapids is not a platform that makes sense to deploy unless your environment requires Intel for whatever reason.

Things will get interesting a couple generations from now, now that mobos are transitioning to 192 GB capacities. While Intel's IMC is good but could be better they're going to face a whole host of new and interesting problems with their future disaggregated designs not unlike AMD. They may face the same issues AMD has over the evolution of their interconnect, Infinity Fabric. It's easy to piss on Intel and hell knows I've been doing it plenty but I like seeing companies having to get scrappy to stay ahead.


The best thing right now is knowing there's some hot stuff coming out from both soon in the next 12-16 months and ddr5 prices are in freaking freefall. It's christmas minus the annoying people and crappy fruitcake.

 

[SiliconFly]

Intel's previous endeavors were far reaching than that. The inherent problem with Intel's goals then, many years ago, was a costs issue. Going back to the drawing board is always an expensive option but you could theoretically plow on, much like Kerzanich was "plowing ahead" and reduce your costs by way of not spending as much as going back to the drawing table. The kicker in that is you have no idea if you'll succeed or not. It doesn't help that Murthy had been going around laying off brain power. Intel trying to push conventional litho to the limits without wanting to adopt a new process. They were also aggressive in other areas that ultimately resulted in a lot of junked wafers.

Ultimately it comes down to density MTr/mm2 and how much each node can be pushed without peaking in power. If Raptor and Ryzen 7000 weren't 'super clocked" from the factory their power use would be much lower. Right now I can't say either company have a greater edge in performance in desktop. AMD wins in pure power usage. Intel's new workstation platform is a power hog but it delivers good performance. It's AMD's move. AMD's new lineup in mobile is gunning for Intel's throat. Intel's answer in datacenter is marginal at best. Sapphire Rapids is not a platform that makes sense to deploy unless your environment requires Intel for whatever reason.

Things will get interesting a couple generations from now, now that mobos are transitioning to 192 GB capacities. While Intel's IMC is good but could be better they're going to face a whole host of new and interesting problems with their future disaggregated designs not unlike AMD. They may face the same issues AMD has over the evolution of their interconnect, Infinity Fabric. It's easy to piss on Intel and hell knows I've been doing it plenty but I like seeing companies having to get scrappy to stay ahead.


The best thing right now is knowing there's some hot stuff coming out from both soon in the next 12-16 months and ddr5 prices are in freaking freefall. It's christmas minus the annoying people and crappy fruitcake.

You nailed it.

 

[SiliconFly]

Those are what Intel says they are planning to do. It has nothing to do with reality, and the last 5 years or more have proven that. Facts are after it has happened, and these things are planned, but no proof they have happened. STOP saying they are facts, as thats a lie.

You've moderated my post & hidden it. Thatss breach of ethics. If you want to hide my post, then pls do the same to your post too.

 

[SiliconFly]

OMG!!!!!!!!!!! This is extremely worrying. What on earth is happening here? As a moderator, you're expected to be neutral.

Ever since I said good things about Intel, I got attacked many times. But none of that mattered. But a moderator attacking me openly is a serious issue.

Just read the last 100 posts. See how much of hate, misinformation & FUD is being spreadu about Intel. And you never said anyting. No one cares.

I speak 2 good things abt Inetl, and now I'm immediately the evil person, lair, villain and more importantly you openly tell me to STOP posting messages inspite of being a moderator. God!

Is this the end of free speech in anandtech? I'm very very worried!!!!!!!!!!!

 

[SiliconFly]

Here's a wikichip article link that compares Intel 4 with TSMC N5 & N3. And it clearly says Intel 4 is closer to or even better than TSMC N3!!! I wasn't lying.

Here's a semiwiki article link that says Intel 3 is clearly better than TSMC N3. I wasn't lying.

Intel has made significant progress & many may not like it or believe it. I'm just trying to set the record straight & I'm being constantly attacked & harassed for that, which is fine. But a moderator saying such stuff is an extremely worrying development.

Being a Intel fan at this day and age is already very difficult. Kindly understand the situation before launching an attack.



Mod callouts, are not allowed.
You have already done this three times.


esquared
Anandtech Forum Director

 

[Markfw]

Here's a wikichip article link that compares Intel 4 with TSMC N5 & N3. And it clearly says Intel 4 is closer to or even better than TSMC N3!!! I wasn't lying.

Here's a semiwiki article link that says Intel 3 is clearly better than TSMC N3. I wasn't lying.

Intel has made significant progress & many may not like it or believe it. I'm just trying to set the record straight & I'm being constantly attacked & harassed for that, which is fine. But a moderator saying such stuff is an extremely worrying development.

Being a Intel fan at this day and age is already very difficult. Kindly understand the situation before launching an attack.

It says TARGETED, and it does not say better. Are any chip MADE on Intel 4 ? NO, so you can't say anything about them other than OPINION. The same goes for Intel 3, its a design, not implemented yet. Anything about Intel 3 or 4 is OPINION !!!! And the fact that I post as a user has nothing to do with my moderation. I have opinions also.

 

[Geddagod]

It says TARGETED, and it does not say better. Are any chip MADE on Intel 4 ? NO, so you can't say anything about them other than OPINION. The same goes for Intel 3, its a design, not implemented yet. Anything about Intel 3 or 4 is OPINION !!!! And the fact that I post as a user has nothing to do with my moderation. I have opinions also.

We know the dimensions for the cells for Intel 4. Those dimensions aren't "opinion" they are a fact. Intel released info on it.
We literarily JUST had this discussion a couple days ago.
We know essentially nothing about Intel 3 except for gain in perf/watt. That much is true.
There are chips made on Intel 4, and we have had die shots of it as well. And obviously we can't deduce any exact densities from this, but as a fun thought experiment...
RWC (core only) not counting L2 and L3 is roughly 30% larger than Zen 4 with the same parameters. RWC uses Intel 4 HP only, and Zen 4 uses TSMC 5nm HD cells as their standard cell. RWC has more L1 cache, by a good bit too, but Zen 4 also has IIRC ~25% percent of their chip using their non standard cell so I'm assuming that's HP cells over there. RWC is a bit wider than Zen 4 too architecture wise(considering GLC is as well).
TSMC 5nm HD is roughly 20% more dense than Intel 4. It certainly seems from an extremely broad view that Intel's own claims about Intel 4 HP density wasn't a lie either, if you for some reason believe Intel found it necessary to blatantly lie about physical numbers at a conference. Either that or Intel's architecture team is working wonders out there lmao.
edit: I also would love to make a comment on your "moderation", Mark, but this forum really isn't the place for it. Can we all just... idk chill?

 

[IntelUser2000]

Is this the end of free speech in anandtech? I'm very very worried!!!!!!!!!!!

I agree. But such shifts don't happen overnight. Think a decade+.

Either that or Intel's architecture team is working wonders out there lmao.

The very fact that E cores are so dense that it's comparable to ARM ISO-process level and that AMD "lost" major density advantage in Zen 4 suggests it's the focus on crazy frequency that makes the cores absurdly large.

Now I bet you it's not just tacking on new high density cells and all done. This needs a paradigm shift. The P-core team needs to change their paradigm. This requires a big shift. Like we saw diminishing returns on the high end with Moore's Law, so Apple changed the paradigm and took advantage of it to make it small and power efficient. Intel and AMD hasn't embraced it so they are stuck making laptop chips that doesn't last as long on battery life.

"Let's reduce the Pmax from 5.5GHz to 4.5GHz"
"Bring pipeline stages down from 18-20 stages to 12-14 stages"
"Back off a bit on using ultra high performance cells"

5 stages result in ~10-12% performance gain. You can either relax density in critical cells(such as L1 and L2 caches), or use faster 3-cycle latency. Your mesh, ring and other interconnects are easier to clock to the speed of the core. It'll simplify the circuit so you save power plus reduce transistor count. 15-20% per clock increase, but few % overall(clock x uarch) loss.

The uop cache can be thought of as allowing those high frequencies and minimizing the downsides. Of course it's not free, even though it does a very good job. Cause when there's a uop cache hit, the 18-stage CPU becomes a 14-stage CPU. This is why Gracemont does not require it.

Both companies are stuck in the mini-Netburst/Bulldozer era of thinking, where they look at GHz. Not as crazy as back then, but needs a shift again.

But I can see why it'll take a lot to change. Because the extra bit of performance you get is the reward you get from the absurd frequency(not as absurd as 20 years ago but still). But that last 10% comes at a big sacrifice.

In this case, competition is at fault. Cause if you don't have that lead, as vacuous as it might sound, reviews and the general impression will look negative for you. How did modern CPUs come to use so much power? Because unlike Netburst/Bulldozer, they did it gradually.

 

[Markfw]

We know the dimensions for the cells for Intel 4. Those dimensions aren't "opinion" they are a fact. Intel released info on it.
We literarily JUST had this discussion a couple days ago.
We know essentially nothing about Intel 3 except for gain in perf/watt. That much is true.
There are chips made on Intel 4, and we have had die shots of it as well. And obviously we can't deduce any exact densities from this, but as a fun thought experiment...
RWC (core only) not counting L2 and L3 is roughly 30% larger than Zen 4 with the same parameters. RWC uses Intel 4 HP only, and Zen 4 uses TSMC 5nm HD cells as their standard cell. RWC has more L1 cache, by a good bit too, but Zen 4 also has IIRC ~25% percent of their chip using their non standard cell so I'm assuming that's HP cells over there. RWC is a bit wider than Zen 4 too architecture wise(considering GLC is as well).
TSMC 5nm HD is roughly 20% more dense than Intel 4. It certainly seems from an extremely broad view that Intel's own claims about Intel 4 HP density wasn't a lie either, if you for some reason believe Intel found it necessary to blatantly lie about physical numbers at a conference. Either that or Intel's architecture team is working wonders out there lmao.
edit: I also would love to make a comment on your "moderation", Mark, but this forum really isn't the place for it. Can we all just... idk chill?

I was trying to make a point. Intels "roadmap" is just that. Its what they intend to do. That does not equal an accomplished feat or "a fact" You even admitted that Intel lied about something. And NOTE: I don't care if its Intel, AMD, Samsung, etc.... A roadmap is a plan, not an accomplished fact. This post has nothing to do with Intel. The only possible connection with them is the fact that they have not done well in the last several years in doing that they say they will.

Lastly, I have not done any moderation in this thread ever, so how can you comment on it ? If you do have moderation concerns, open a thread in "moderator discussions", but note: I can post my own opinions just like anybody else here.

 

[Geddagod]

I was trying to make a point. Intels "roadmap" is just that. Its what they intend to do. That does not equal an accomplished feat or "a fact" You even admitted that Intel lied about something. And NOTE: I don't care if its Intel, AMD, Samsung, etc.... A roadmap is a plan, not an accomplished fact. This post has nothing to do with Intel. The only possible connection with them is the fact that they have not done well in the last several years in doing that they say they will.

Lastly, I have not done any moderation in this thread ever, so how can you comment on it ? If you do have moderation concerns, open a thread in "moderator discussions", but note: I can post my own opinions just like anybody else here.

You can try to make a point using correct examples. You were just completely wrong about Intel 4.
Not everything @SiliconFly said was wrong or unconfirmed. We know a bunch about Intel 4, the node. Intel 3 and beyond, we don't know much.
When did I admit Intel lied about anything? I said Intel probably didn't lie about Intel 4 specs. That was the entire point of the fun thought experiment. Besides, I don't think companies can outright lie about physical numbers like that. They can claim "oh we didn't know SPR was going to be delayed again" and lie like that, they can claim "oh we didn't expect Intel 10nm to have such bad yield" and lie like that, they can claim "oh in our (obviously cherry picked) 3 game benchmark the 13900ks beats the 7950x3d by 200%" and lie like that, but those all have "outs" which they can explain to investors or the public about. Besides, wasn't the presentation presented at like an actual tech conference as well? That's different from a product launch or anything like that.

 

[Geddagod]

Also I understand why people have been saying Intel 4 isn't a proven node yet. We still don't have any product launched on it, sure. MTL isn't out yet, after all. Yields might be bad, fmax might peak at 4GHz, idk.
What I don't get is why people say we don't know anything about Intel 4, because MTL isn't out yet.
Like guys, we have physical data about the node itself. And if you actually care about design, we have die shots of RWC on Intel 4.
At the very least, we have density information?

 

[jpiniero]

Intel Xeon W9-3495X hits 1881 watts during overclocking session - VideoCardz.com

This Sapphire Rapids CPU consumes 1.9 kilowatts during OC Intel next-gen HEDT platform also known as Sapphire Rapids WS/112L/64L has only been released last month, but this was enough time for overclockers to claim multiple world records already. The Xeon W3400X series excel at multi-threaded...

videocardz.com

Overclocker got SPR-W up to 1881 W.