That scepticism, at least, is plenty justified.Indeed, you were also skeptical about a higher core count Meteor Lake die for the desktop in the absence of concrete details.
That scepticism, at least, is plenty justified.Indeed, you were also skeptical about a higher core count Meteor Lake die for the desktop in the absence of concrete details.
HEDT has been Dead for a while.....I don't like how that looks for saphire rapids....
It shows the end of HEDT maybe true for both AMD and Intel.
Seems like us filthy gamers are seen as not needing many PCI-E lanes, and only care about overclocking with lots of RGB.
To me, it seems like PCI-E lanes have been having the biggest improvements recently.Seems like us filthy gamers are seen as not needing many PCI-E lanes, and only care about overclocking with lots of RGB.
ThreadRipper Pro
To me, it seems like PCI-E lanes have been having the biggest improvements recently.
The initial die/configuration explains the core count range and TDPs. Probably in a few months we'll start seeing leaks for lower core count MCC/LCC models. That's also where any HEDT chips would likely be derived from.
There's not a chance in heck that Meteor Lake is ready for production by the end of the year, even if Intel 4 is. Probably Q2 for volume production, earliest, and Q3 before we can actually buy any.If you recall, Meteor Lake was powered on a couple of months back, and if volume production cranks up at the end of this year as promised, we’re looking at a scenario where the 14th-gen processors could potentially be out in Q2 of 2023, or maybe even Q1 – at a real push.
On balance, we think Q2 2023 now seems the most likely release date for Meteor Lake – maybe with laptop chips coming first (perhaps by some distance), a possibility another rumor pedlar has floated – in terms of giving Raptor Lake enough breathing space.
Also, is this the first rumor/"confirmation" of Sapphire Rapids being QS ready? Because that's a significant milestone, especially in light of the '23 rumor.
Or just a dual socket platform would be great too. Give max 16 cores per socket with 8 memory channels and let the enterprise have the higher end stuff with Epyc/Xeon.The really sad part is that HEDT could relatively easily be served by just a chipset for most cases.
Kuo was claiming H2'23. You don't have QS samples shipping more than a year ahead of launch. QS means almost final.Given that Sapphire was (last year) intended to launch in 1H 22, that there are QS shouldn't be surprising. Guessing Intel will announce the new launch timeframe at the next earnings release.
ThreadRipper PRO does not fill that definition in any form with what HEDT stands for.
The really sad part is that HEDT could relatively easily be served by just a chipset for most cases. Most of the clamoring for am HEDT platform is looking for more PCIe lanes. With 16 lanes of PCIe 4 or 5 available from the processor, a chipset with an embedded PLX switch could easily turn that into 32 to 64 PCIe 3 lanes. Just expanding the chipset uplink to 8 lanes of PCIe 5, which is not a crazy request for Zen4 processors, could have been enough to give a bunch of lanes from the chipset without too much link congestion.
A 7950x with good DDR5 could easily drive the same throughput as a 3995x and with the right chipset, give 64 lanes of PCIe 3 on an hedt board.
Kuo was claiming H2'23. You don't have QS samples shipping more than a year ahead of launch. QS means almost final.
Looking at Intel Meteor Lake diagram info this is what stands out.
P Cores + E Cores and... + LP E Cores..
Are these LP E Cores just down clocked E Cores?
So far both Quad Cluster look identical
But the short and skinny is that compute die has the P cores and the E core clusters, and the LP E cores are on the SOC die, which is on the older node (Intel 7).
We know that the ability to havw two x8 slots is being carried forward. If both of those GPUs are PCIe 5, and they can't saturate an x8 pcie 5 link, then you're good there. Unless you're splashing enough money to be able to support a workstation platform, its unlikely that you will hit that limitation. As for the NVME, we know that at least one is directly attached to the processor. There will be at least x4 pcie 4 slot available from the chipset, with a similar link speed to the processor, so, aside from some rare instants where you are really pushing a ton of USB traffic or multiple 10Gb ethernet cards, any bottleneck there should be negligible for one drive on the chipset.On topic of this, will i be able to run 2 GPUs and 2 nvme drives on that X670 board with 7950x? Cause that is my intention /need. I mean, without compromised performance anywhere.
Ehh? So Intel is only making the compute die and the base die for Foveros? That's interesting. It's not like they have a shortage of Intel 7 throughput. I wonder why they want to outsource that to TSMC...The SoC is rumored to be using N6 actually.
The SoC is rumored to be using N6 actually.