ashFTW
Senior member
- Sep 21, 2020
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Another observation:
There are two “rectangles“ per HBM EMIB for the presumably XCC version of SPR chiplet. Could it be that the larger configuration supports 2 HBM stacks per XCC chiplet for a total of 16GBx8 or 128GB per chip? I know that Intel has said upto 64GB, but often Intel doesn’t disclose details at the very high end. The photo shown of the assembly with one HBM stack per chiplet could be for the HCC variant.
There are two “rectangles“ per HBM EMIB for the presumably XCC version of SPR chiplet. Could it be that the larger configuration supports 2 HBM stacks per XCC chiplet for a total of 16GBx8 or 128GB per chip? I know that Intel has said upto 64GB, but often Intel doesn’t disclose details at the very high end. The photo shown of the assembly with one HBM stack per chiplet could be for the HCC variant.