Fair point, but how do you explain the i7 branding for the 4 core? Maybe bigger die is really not viable. Did the 8 core entry come with a branding string?
Dayman1225
Golden Member
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Nope. TGL-H 35w is 4c. TGL -H 45w is 8c but comes later.
But why even have a QC i7 SKU if they aren't hesitating on whether they can actually yield the 6/8 core models?
One thing that I noticed is that there are no models with Thunderbolt disabled, at least publicly. Could be what the 11370H ends up being, basically a 4C+32 EU model without the IPU and Thunderbolt.
Hulk
Diamond Member
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My Rocket Lake theories have been correctly getting shot down by admittedly more knowledgeable members of this forum. Based on what I have learned I'm going to put one more hypothesis out there for you all to take down.
The basic premise is why is Rocket Lake a backport of Sunny Cove instead of Willow Cove and why is it 14nm instead of 10SF?
Intel has obviously been having issues with their 10nm process. Clockspeed and yields are most likely the issues although we don't know exactly.
My thoughts.
Intel has limited 10SF capacity. In addition, yields and clockspeeds (yes I realize they are related) are more limited then their current 14nm process.
10SF is better than 14+++ in terms of mobile U parts (higher clocks, lower TDP, die space). If there is limited capacity with 10SF it must go to mobile where TDP is critical because for desktop they can literally to nuclear with 14+++.
So now Intel has made the decision to devote all 10SF capacity to Tiger Lake mobile 14+++ will have to continue to "stand in" for the desktop.
Since Willow Cove requires more die space than Sunny Cove they made the calculation that it would be better to go 8 core with Sunny rather than perhaps a max of 6 core with Willow.
(ducks)
The basic premise is why is Rocket Lake a backport of Sunny Cove instead of Willow Cove and why is it 14nm instead of 10SF?
Intel has obviously been having issues with their 10nm process. Clockspeed and yields are most likely the issues although we don't know exactly.
My thoughts.
Intel has limited 10SF capacity. In addition, yields and clockspeeds (yes I realize they are related) are more limited then their current 14nm process.
10SF is better than 14+++ in terms of mobile U parts (higher clocks, lower TDP, die space). If there is limited capacity with 10SF it must go to mobile where TDP is critical because for desktop they can literally to nuclear with 14+++.
So now Intel has made the decision to devote all 10SF capacity to Tiger Lake mobile 14+++ will have to continue to "stand in" for the desktop.
Since Willow Cove requires more die space than Sunny Cove they made the calculation that it would be better to go 8 core with Sunny rather than perhaps a max of 6 core with Willow.
(ducks)
IntelUser2000
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@Hulk I personally concluded that die size is the reason for not using Willow Cove. 40-45mm2 for 4 cores mean 90mm2 on the 14nm process, and 180mm2 with just 8 cores. If you add in the System Agent, the Memory/PCI Express PHY, and the iGPU, its going to end up at 250mm2 or larger. And they are having problems with supply.
There are likely lower level details that changed on the 14nm backport which might lead to low single digit percentage performance loss.
Even on desktops Rocketlake uses so much power that its going to rival 200-250W of Cometlake again.
Might be a combination of all three, clock speeds falling slightly short, yield issues, and not enough capacity on 10nm.
@jpiniero They had Kabylake-X, which made little sense. The 11370H might also be based on the Tigerlake-H die even though its 4 cores just like TGL-U.
@Exist50 It's interesting how much the two teams diverge in architectural details. I'm excited to see Jasper Lake.
Unlike Elkhart Lake, Jasper Lake is an SoC. Elkhart Lake has 3x 2.5GbE and other I/O features that's going to be useful for IoT and may have needed a separate PCH. Jasper Lake won't need the 2.5Gbe nor the extra IO, and it'll integrate the WiFi MAC again. SoC also lowers system level power which is a great thing for laptops.
There are likely lower level details that changed on the 14nm backport which might lead to low single digit percentage performance loss.
Even on desktops Rocketlake uses so much power that its going to rival 200-250W of Cometlake again.
Might be a combination of all three, clock speeds falling slightly short, yield issues, and not enough capacity on 10nm.
@jpiniero They had Kabylake-X, which made little sense. The 11370H might also be based on the Tigerlake-H die even though its 4 cores just like TGL-U.
@Exist50 It's interesting how much the two teams diverge in architectural details. I'm excited to see Jasper Lake.
Unlike Elkhart Lake, Jasper Lake is an SoC. Elkhart Lake has 3x 2.5GbE and other I/O features that's going to be useful for IoT and may have needed a separate PCH. Jasper Lake won't need the 2.5Gbe nor the extra IO, and it'll integrate the WiFi MAC again. SoC also lowers system level power which is a great thing for laptops.
It's only 45W for 3.1ghz on 10SF according to that twitter post awhile back compared to the 10980HK's 2.4ghz at 45W or 3.1ghz at 65W
Gracemont is supposedly when the Atom team really starts to show off. Hopefully we see it on Alder Lake soon enough, and it isn't too overshadowed by Golden Cove.
IIRC, both have a separate PCH.
IntelUser2000
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@Exist50 I was curious and I did searching.
If it had a separate PCH, they'll be seriously going back on power efficiency.
Notice how a single generation was enough to have Atom threaten Core. It was the Goldmont Plus generation that really got interesting. I'm guessing the Atom team wasn't interrupted by the delay to 10nm because GLM+ was planned on 14nm from the beginning.
The fact that the decoders use the x86 instruction directly also means in some cases each issue is wider than the ones in Core. It's interesting because the decode into uops was supposed to help with ILP, and it started with Pentium Pro. So the Atom team really went a different way.
Gracemont will be a very important part in reaching competitive multi-thread performance for mobile PCs, so I don't think it'll be overshadowed. It's critical both sets work together in MT unlike Lakefield(probably limited by power).
If it had a separate PCH, they'll be seriously going back on power efficiency.
Notice how a single generation was enough to have Atom threaten Core. It was the Goldmont Plus generation that really got interesting. I'm guessing the Atom team wasn't interrupted by the delay to 10nm because GLM+ was planned on 14nm from the beginning.
The fact that the decoders use the x86 instruction directly also means in some cases each issue is wider than the ones in Core. It's interesting because the decode into uops was supposed to help with ILP, and it started with Pentium Pro. So the Atom team really went a different way.
Gracemont will be a very important part in reaching competitive multi-thread performance for mobile PCs, so I don't think it'll be overshadowed. It's critical both sets work together in MT unlike Lakefield(probably limited by power).
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Hulk
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On a different "Lake" topic, what do we know about how the big and little cores of Alder Lake will perform when the entire CPU is under full load? I read that that there is some concern regarding balancing threads. Meaning which threads will get the big cores and which ones get the little cores? Does this matter in practice?
How different is this than in current CPU's where cores are operating at different frequencies? I realize this is far from an apples-to-apples comparison since the cores are identical and the frequency differences are small, but the concept seems the same to me.
Would these CPU's require changes to the Windows scheduler to maximize performance or can the current scheduler just "do it's thing" and still keep all the cores loaded? I'm thinking the issue might be that the little cores holding up the big ones as they struggle to complete their threads?
Most applications seems to stress one core, how will the system know to assign that thread(s) to a big core?
How would a current 8 core CPU perform if we could clock 2 cores at 4GHz and the other 6 really low at like 800MHz? Is that possible to do in the BIOS? It would be interesting to see the result of such and experiment. Beside performance numbers it would be interesting to see how "loaded" each core would be in task manager.
How different is this than in current CPU's where cores are operating at different frequencies? I realize this is far from an apples-to-apples comparison since the cores are identical and the frequency differences are small, but the concept seems the same to me.
Would these CPU's require changes to the Windows scheduler to maximize performance or can the current scheduler just "do it's thing" and still keep all the cores loaded? I'm thinking the issue might be that the little cores holding up the big ones as they struggle to complete their threads?
Most applications seems to stress one core, how will the system know to assign that thread(s) to a big core?
How would a current 8 core CPU perform if we could clock 2 cores at 4GHz and the other 6 really low at like 800MHz? Is that possible to do in the BIOS? It would be interesting to see the result of such and experiment. Beside performance numbers it would be interesting to see how "loaded" each core would be in task manager.
Read that as it being not just the PCH die. It's an SoC in the same way Tiger Lake is, i.e. with some but not all southbridge IO integrated on the main die. 99% certain Jasper Lake and Elkhart Lake only differ in the PCH die.
The Atom team did not have the complacency and arrogance of the Core team. That's ultimately what it boils down to. 10nm delays don't excuse the lackluster gains Skylake to Willow Cove. Pretty much every CPU architecture in the industry (Atom, Zen, ARM's various, Apple's) have advanced at a faster pace than Core.
IntelUser2000
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Here's another:
- Intel Elkhart Lake (PCH)
- Intel Tiger Lake (PCH)
- Intel Jasper Lake (SOC)
No it clearly isn't, TGL-H35 iGPU gets 96 EUs which means it's not based on TGL-H 8C which only gets 32 EUs. Also the CPUID Identifier model number is identical to TGL-UP3 and the motherboard is called TigerLake U in this Geekbench entry, this is another evidence.
Reasonably well written SW schedule tasks dynamically. This means whenever a big core has a task finished it is getting a new task assigned, independent of the small cores have finished. You can observe this pretty good on the Surface Pro X. I have yet to see a (scalable) program, which leaves any of the cores under-utilized because of tasks taking longer on the small cores. An example for such kind of application is Blender.
There are of course non-scalable programs, which have a fixed number of threads, with fixed assignments of tasks to threads - most notably games. Here the OS scheduler helps - if it sees a big core under-utilized it will re-schedule the threads - again you can observe this on the Surface Pro X.
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IntelUser2000
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RKL-S launch in January without a new chipset.
A welcome development.
Comet Lake will go down as one of the shortest-lived generations: 8 months, even shorter than Kaby Lake.
Now Intel only needs to do away with memory clock locks on non Z motherboards. The best way to compete with 32MB L3 5600 chips is to not shoot your own chips in the foot with 2933 memory.
Looking forward to Intel actually releasing these chips, as long as they are priced right.
Looking forward to Intel actually releasing these chips, as long as they are priced right.
shady28
Platinum Member
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shady28
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That's where your logic fails.
Look at top selling Intel laptops, and even a bunch of AIO desktops. They're running Ice Lake, which is on 10nm. And that is coming from I believe 3 fabs, maybe 4 I forget. Intel has I believe 16 fabs total. And those 4 fabs are not just making Ice Lake / Tiger Lake chips - they're also doing HPC stuff and have probably been making Ice Lake server chips for some time.
Given that laptops sell significantly more than desktops, and that Intel has 80-85% of both markets, I think it would be a safe bet that there are more Intel 10nm parts for sale than AMD 7nm parts at this time. It looks to me like Intel's 10nm fabs are all going full tilt boogie.
I looked at the "top laptops" on Amazon and besides the 2020 i3 Macbook Air (Amazon might be clearing those out) there isn't that many Icelake on there and def more Ryzen. Things are changing, OEMs are more willing to accept Ryzen now.
Plus retail is only a small portion of the laptop market. Most of it is corporate purchasing, which you would think would almost entirely be 14 nm.
From what little I've been able to see being shipped, the retailers are still moving boatloads of i3-1005g1 and i5-1035g1 laptops. Just doing quick searches on web availability, listings for those units are hitting sold out within minutes some days. Either Intel is intentionally crippling the vast majority of their new production 10nm products, or they are still having significant yield split issues. They are moving the i3 chips at barely better than celeron/pentium atom level prices.
On a further note with Tigerlake there is a big change. At the moment there are like 200 Tigerlake devices+configurations listed in the retail market and only ~5 of them are sold with an i3. Basically there is only i5-1135G7 and i7-1165G7 and actually there are more i7 than i5 models/configurations listed.
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