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Discussion Intel current and future Lakes & Rapids thread

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Pretty sure we will never see ADM on any of Intels GT2 SKUs for MTL and ARL. If there is a GT3 for ARL with 320EU or even 384EUs this could be an option. In the older ARL-P roadmap it sounded like ADM will be exclusive to GT3 models to maximize performance (GT3 N3 with ADM to maximize performance). ARL GT2 with 192EUs I don't think we will see this.
 
www.hardwaretimes.com

Intel 17th Gen CPUs to Get Rentable Units: Why Hyper-Threading is Going Away | Hardware Times

Intel’s adoption of the hybrid core architecture has significantly changed the roadmap of the PC chipmaking industry. More and more applications are now taking advantage of the “secondary” low-power E-cores to boost performance and efficiency. This approach has its shortcomings, which Intel...
www.hardwaretimes.com www.hardwaretimes.com

Intel is going to dynamic thread splitting...
I guess that the Slipstreame 2.0 will come, because E-core is best choice for speculative precomputation.

 
lightisgood said:
www.hardwaretimes.com

Intel 17th Gen CPUs to Get Rentable Units: Why Hyper-Threading is Going Away | Hardware Times

Intel’s adoption of the hybrid core architecture has significantly changed the roadmap of the PC chipmaking industry. More and more applications are now taking advantage of the “secondary” low-power E-cores to boost performance and efficiency. This approach has its shortcomings, which Intel...
www.hardwaretimes.com www.hardwaretimes.com

Intel is going to dynamic thread splitting...
I guess that the Slipstreame 2.0 will come, because E-core is best choice for speculative precomputation.
Click to expand...
Running speculative thread on E-core would not benefit anything. Speculative thread needs to be run ahead of main thread - so it need to be faster than main thread and so close to main thread that it will be part of cpu core to offer any meaningful help to execution.
 
SiliconFly said:
My bad. I think i didn't explain myself clearly.

(I was just comparing Zen 4 -> Zen 5 vs RPL -> ARL. Thats all)

What I was trying to say was, AMD is going from Zen 4 to Zen 5 (say N4 to N4P), and the density increase is non-existent. So, the transistor budget remains the same. The only way to increase IPC is to re-architect with the same amount of transistors (assuming the die size remains the same).

And Intel is going from RPL to ARL (say Intel 7 to 20A), the density increase is from 100 MTr/mm2 to around 300+ MTr/mm2. ARL gets 3X the transistors for the same die area.

Intel can shrink the ARL die to save cost, but I don't think they'll do that. I think the ARL die is gonna get a significantly higher transistor budget compared to RPL, And those excess transistors can easily be used to increase L2/L3 caches in the cpu tile or even increase core logic for more performance.
Click to expand...
At least I was spot on about this a while back... 🙂

I did say ARL is gonna get a bigger cache. News leaks suggest that ARL is getting a 50% bump in L2. i.e, up to 3MB of L2.

Looks like, instead of doing something great with the massive transistor budget, Intel has chosen the easiest & safest way instead. Yuck.
 
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SiliconFly said:
Looks like, instead of doing something great with the massive transistor budget, Intel has chosen the easiest & safest way instead. Yuck.
Click to expand...
Yeah coz that will mainly translate to better gaming performance and that's what they prefer to focus on. They have been failing at competing in MT workloads for a while now (barely stand up to 5950X and 7950X).
 
SiliconFly said:
I did say ARL is gonna get a bigger cache. News leaks suggest that ARL is getting a 50% bump in L3. i.e, up to 3MB of L3.
Click to expand...
Leak was talking about L2 not L3.
SiliconFly said:
Looks like, instead of doing something great with the massive transistor budget, Intel has chosen the easiest & safest way instead. Yuck.
Click to expand...
Why can't it be both?
igor_kavinski said:
Yeah coz that will mainly translate to better gaming performance and that's what they prefer to focus on.
Click to expand...
Eh. Doubt they 'prefer' to focus on gaming performance.
igor_kavinski said:
They have been failing at competing in MT workloads for a while now (barely stand up to 5950X and 7950X).
Click to expand...
?
 
Geddagod said:
Why can't it be both?
Click to expand...
I don't think it can be. Some leaks suggest ARL has RWC+ cores. Others suggest it has the first iteration of the LNC cores (and hence no hyper-threading).

If ARL has RWC+ cores, then there's nothing new to expect, except bigger caches and some minor improvements I guess.

If it has some form of LNC, then it's a whole different story. Need more clarity about ARL cores though.
 
igor_kavinski said:
www-computerbase-de.translate.goog

Intel Core i9-13900KS mit 6,0 GHz im Test

Der Core i9-13900KS ist der erste Intel-Prozessor mit bis zu 6,0 GHz ab Werk. Die dritte Special Edition in Anwendungen und Spielen im Test.
www-computerbase-de.translate.goog www-computerbase-de.translate.goog

View attachment 84509
Even their KS paired with faster memory has trouble matching a 7950X in overall MT perf.
Click to expand...
The benchmark you linked shows a single percentage point difference. I wouldn't consider that having trouble matching 7950X MT performance.

Just to save us time... Yes - I know it isn't anywhere near as efficient.
 
A/// said:
Isn't he the hardcore intel apologist? can someone explain rentable cores to me.
Click to expand...
From what I understand, Intel will slice a single thread into different instruction streams and try to process them on different cores so that if one instruction stream comes to a halt for whatever reason, the processing keeps going on, on the other cores and results are ready before the execution reaches that part of the process's instructions.
 
igor_kavinski said:
From what I understand, Intel will slice a single thread into different instruction streams and try to process them on different cores so that if one instruction stream comes to a halt for whatever reason, the processing keeps going on, on the other cores and results are ready before the execution reaches that part of the process's instructions.
Click to expand...
That makes sense on paper but I'm not sure that's how it works in real life. I'm just an arm chair CPU architect, but if a single thread could be simply chopped up into smaller, bite sized portions that can be executed in parallel, wouldn't a GPU be better at the task? Single threaded processes tend to have a crap load of dependencies, which is why they run best on CPUs to begin with. If portions of the instruction stream could be done in parallel, well that's where having a superscaler execution engine comes in.
 
Saylick said:
That makes sense on paper but I'm not sure that's how it works in real life. I'm just an arm chair CPU architect, but if a single thread could be simply chopped up into smaller, bite sized portions that can be executed in parallel, wouldn't a GPU be better at the task?
Click to expand...
You would need a GPU that understood x86, AKA LARRABEE! 😀
 
igor_kavinski said:
From what I understand, Intel will slice a single thread into different instruction streams and try to process them on different cores so that if one instruction stream comes to a halt for whatever reason, the processing keeps going on, on the other cores and results are ready before the execution reaches that part of the process's instructions.
Click to expand...

Isnt it what a OoO uarch is supposed to do..?.
 
igor_kavinski said:
From what I understand, Intel will slice a single thread into different instruction streams and try to process them on different cores so that if one instruction stream comes to a halt for whatever reason, the processing keeps going on, on the other cores and results are ready before the execution reaches that part of the process's instructions.
Click to expand...
very similar to how download streams work. each connection within the main download will download a portion of the file, if one fails others take over and then decompress the download from cache.

this being intel and I need not explain some half baked ideas they've had. I'm not sure if it'll work out well or bad.
 
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