Discussion Intel current and future Lakes & Rapids thread

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igor_kavinski

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Jul 27, 2020
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Even for GNR, if it taped out in Q2, then we've already long passed the point where she could significantly influence its direction
The article mentioned that the delays were the result of lack of proper testing. So she's probably making sure they test GNR right and don't repeat the SPR mistakes.
 

mikk

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May 15, 2012
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speaking of fire.... The 13900k and 13900ks chips are on fire as well, temps and power usage both off the charts.

Should we call Intel a "fired up" company ?

Is this trolling necessary? This is really low from a moderator.

Moderation callouts are not allowed. If you have an issue with moderation, or with a member, you can contact the staff in the moderation discussion forum, or report a post. AT Moderator Shmee
 
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igor_kavinski

Diamond Member
Jul 27, 2020
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PS. As for cryptic terminology in this industry, I particularly hate "tick tock". I never saw the need to have "clever" terminology for something that could just be simply stated clearly as new design or process node, and I still find it ever confusing, since I cannot remember which come first
Think of it in terms of the tick tock sounds that a clock makes. Tick is the faint sound. Tock is the louder one. Intel used this analogy in reverse. They should have called it tock tick to clear up confusion but of course then people would have complained, what the heck is tock tick, it doesn't exist in the real world. It's a bad analogy blah blah.

Anyway, new architecture is tock and then they do a subsequent optical shrink of that architecture on a new process, the tick, to test the process, so as not to have too many unpredictable changes happening at once. But as we all know, they were forced to discard their own cadence model due to internal mismanagement and got stuck in a long line of tocktocktocks on the same 14nm process (Kaby Lake, Coffee Lake, Comet Lake and Rocket Lake).
 
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IntelUser2000

Elite Member
Oct 14, 2003
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But as we all know, they were forced to discard their own cadence model due to internal mismanagement and got stuck in a long line of tocktocktocks on the same 14nm process (Kaby Lake, Coffee Lake, Comet Lake and Rocket Lake).
Good point.

Tock is the bigger one though so Tick Tock is correct.

I wouldn't call Kaby/Coffee/Comet Tocks. They are Ticks without the process change, so the worst of both. Rocketlake is a Tock but with terrible planning, look how badly the product turned out.
 
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Exist50

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The article mentioned that the delays were the result of lack of proper testing. So she's probably making sure they test GNR right and don't repeat the SPR mistakes.
Lack of proper testing? They laid off the pre-silicon validation team, crammed in an insane amount of scope for one gen (DDR5, PCIe 5.0, CXL, Golden Cove, AMX, chiplets, accelerators, and god knows else that didn't even make it to market), and are still acting surprised it's a dumpster fire? No, any other result would have been shocking, but not this one. "Lack of proper testing" is PR speak, because they don't dare admit how bad the reality was/is.

And Rivera's team doesn't do the validation either. The questions anyone should be asking of her is, did her org give the engineering team the time, money, staffing, and scope needed to have a predictable execution schedule? The fact that they're doing layoffs even now certainly doesn't inspire hope. Nor the fact that they're using their 2023 core in a 2024 product. Either way, Rivera switched roles too late to decide those big questions for GNR, so it'll take till DMR earliest to see her mark.
 

DrMrLordX

Lifer
Apr 27, 2000
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And yet it also claims they're not necessarily an Intel 4 problem, and GNR is on track. Been saying for ages now that MTL execution is a mess, and it sounds like that hasn't changed much. Will have to see how GNR goes, but 2024 is already disappointingly late for something as lackluster as RWC.
Sapphire Rapids allegedly wasn't a 10ESF problem as well, and from the looks of things, that assessment may be at least partially true. That being said, Sapphire Rapids still turned out badly for Intel.
 

mderbarimdiger

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Nov 8, 2022
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For the record; Rivera stated that the problem was with asking to much for Sapphire Rapids, which is the same old problem that let Intel fall behind TSMC, being way to ambitious.

But she pointed out as to why it was delayed again last year June, for that last delay she gave an excuse that it was related to a bug detected at that time.

Her solution to the bigger problem is to ensure that intel will improve step by step instead of making big dramatic changes within one cycle.

And the solution to avoid something like the late detection of SPR issues is - according to Rivera - to use more simulation.
 
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Exist50

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Sapphire Rapids allegedly wasn't a 10ESF problem as well, and from the looks of things, that assessment may be at least partially true. That being said, Sapphire Rapids still turned out badly for Intel.
I've been saying this for how long now? It would actually be much better for Intel if their issues were just fab related, but reality isn't so kind.
For the record; Rivera stated that the problem was with asking to much for Sapphire Rapids, which is the same old problem that let Intel fall behind TSMC, being way to ambitious.
It's a cop out. They "asked too much" because they refused to hire/fund the teams necessary to pull it off.
And the solution to avoid something like the late detection of SPR issues is - according to Rivera - to use more simulation.
You mean to tell me that the solution to an enormous amount of post-silicon bugs is to actually have pre-silicon validation?!? Such keen insight is clearly why they're paying her the big bucks!
 

DrMrLordX

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I've been saying this for how long now? It would actually be much better for Intel if their issues were just fab related, but reality isn't so kind.
Well after IceLake-SP, what did you expect? That was a foundry-led disaster.
 

Exist50

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Well after IceLake-SP, what did you expect? That was a foundry-led disaster.
No. Not entirely, at least. Ice Lake had many of the same design/validation issues of SPR, just not quite as severe. But it still shipped on what? D? E? Worse? And that probably helped contribute to the SPR delays by pulling away the already thin validation resources to get ICL-SP to market.

That's a major flaw of Intel's current rhetoric. They have a mountain of technical debt that needs to be paid. You don't get a clean slate with each new gen. Rather, you build on the foundation of the previous ones.
 

DrMrLordX

Lifer
Apr 27, 2000
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But it still shipped on what? D? E? Worse?
It took forever to ramp after it "shipped". They had major supply problems. 10nm+ was clearly not yielding well, and from the financials it looks like it really hurt Intel's margins when selling that product.
 

Exist50

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Aug 18, 2016
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It took forever to ramp after it "shipped". They had major supply problems. 10nm+ was clearly not yielding well, and from the financials it looks like it really hurt Intel's margins when selling that product.
IIRC, part of that delay was a late discovery requiring another metal stepping, similar to SPR. Obviously, not the only issue it had, but there really are quite a few parallels between the two.
 

Markfw

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nicalandia

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Jan 10, 2019
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It seems to have a pretty commanding MT lead vs the Threadripper, from the benchmarks I'm looking at. Which ones are you referencing?

1674677331347.png



There are like 20 entries that are higher than 41K numbers, these are a few




 

Exist50

Golden Member
Aug 18, 2016
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View attachment 75323



There are like 20 entries that are higher than 41K numbers, these are a few




Thanks. Wonder why that low one is the default entry.
 

nicalandia

Platinum Member
Jan 10, 2019
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Thanks. Wonder why that low one is the default entry.
It just a tool that gather ALL scores of accross every entry and of different Operating Systems like OS Linux, Windows and combines it.

Here is the full list of entries for the 5995WX in Windows(we can't compare Windows vs Linux)


We can't really draw conclusions based on a single entry, here is the lowest entry for Windows for the 5995WX

1674678044894.png


Now, I will admit that SPR-SP is not as bad as I predicted, it's saving grace are it's powerful AVX-512 and AMX accelerators that give them a strong case in many HPC market. But I believe this impact will not be as strong for the HEDT parts since most Designers that this will be pitch for already have powerful GPUs that do the SIMD much better. When reviews drop they will not be testing Fluid Dynamic simulations nor Machine Learning apps, but mostly desktop App
 
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