I am curios , given the organization structure updates intel announced yesterday, in your opinion how likely is it for intel to execute on the falcon shores concept within 3 years from now? is that moving the needle ?
I think there's basically no chance we'll see Falcon Shores before 2026. My reading of that announcement is that the entire AXG org got demoted to a subsidiary of DCAI, and I think that's a mistake in the long run, and/or likely something that they revert in the future. By contrast, NEX seems to be very successful as an independent, self-contained entity.
Even more interesting is Raja. They say he's going back to the "Chief Architect" role, but it's entirely different. Raja used to have all of the graphics, software, and some miscellaneous other teams under himself as "Chief Architect". Then that got narrowed down to mostly just graphics (ok, sensible enough). Now he doesn't seem to lead anything. I can't help but wonder what his future is at Intel. In particular, I question why they published this news publicly in the first place. Intel doesn't do that for every major reorg, so my gut feeling is there must be some politics at play.
But to answer your actual question, I consider this neutral to slightly negative for Falcon Shores, and remain firm in my belief that we won't see it till 2026-27.
Maybe. In the old reddit leak Nova Lake was the one with the entirely new architecture. Seems like we will see two major Cove updates before this, or maybe one. I don't know what Panther Cove brings to the table, maybe it's more a refresh of Arrow Lake/Lion Cove who knows.
Wouldn't be suprised if PTL Next/Nova Lake ends up being DDR5 as well. LGA 1851 is a beefy socket and I hope Intel at least does ARL>PTL>NVL. I mean DDR6 can wait until like 2027 or so (or hell arguably they could just skip DDR6 & PCI-e 6.0 entirely).
Maybe Panther Cove is an iteration of Lion Cove on 18A from N3E? Makes sense to me.
Also LGA 1851 supporting 3 generations doesn’t mean Intel won’t require 3 different motherboards, one for for each gen, which they did in the past like with LGA 115X. The socket could be exactly the same but they might for commercial reasons decide it makes more sense to roll out multiple motherboard gens. The board partners certainly won’t complain over the chance to sell more boards, like with the incremental generations of Skylake needing new motherboards.
Nova ist the 4th generation and entirely new by the looks of it, no chance. Best case will be Panther Lake for LGA18xx.
Hulk
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Yes, I remember them farting around with the voltage regulators. On chip then off then on... I think that was why same pinout chips needed different mobos.
Intel's never done that specifically. You've pretty much always gotten two. You're thinking of 1151 / v2, which each one technically got two generations of chips. I do think they were going to allow v2 to work with Kaby Lake but at the last moment decided otherwise.
Guess we will have to see if they do some sort of 1700 v2 with Raptor Lake Refresh.
What are the chances of Intel doing a reverse Rocket Lake and putting the RPL refresh on Intel 4? I mean, Intel did start designing node agnostic CPUs after the 10nm fiasco.
BorisTheBlade82
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IMHO they are rather low as I suspect that Intel is not able to produce a whole monolithic SoC on Intel4. As far as we know, the process is rather "tailored" - a lot of libraries on the PDK is missing. While everything for the Compute Tile of MTL might be there, for a SoC you need a broader set - especially IO.
Chips & Cheese has an article out. like always, more technical than empirical
Golden Cove’s Lopsided Vector Register File
chipsandcheese.com
Golden Cove’s Lopsided Vector Register File
Golden Cove’s Lopsided Vector Register File
Ever since Intel first brought AVX-512 to their big core lineup, they made all of the vector registers 512-bit. They extended the vector register file on the opposite side of the execution units, a…
chipsandcheese.com
There's also Cougar Cove somewhere, reportedly for Panther Lake. So this would imply that Nova Lake would be the debut of both Royal and Panther Cove, unless one or both of these posts are currently inaccurate.
DDR6 is targeted to late in the decade. Assuming PTL and NVL are 2025 and 2026 products respectively, that's still firmly in DDR5 territory. PCIe 6.0 might start coming in around 2026, but that would be iffy.
I think the big question for LGA 1851 is whether MTL+ARL count as one gen or two. Because it would kind of suck if it's just ARL->PTL from an enthusiast perspective.
coercitiv
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BorisTheBlade82
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IMHO no one can honestly and truly answer this question as Intel seems to have changed the meaning for these terms.
STH had a nice article about that.
Launches and Mirrors AMD EPYC Genoa and Intel Xeon Sapphire Rapids
AMD EPYC Genoa launches on 2022-11-10 and Intel Xeon Sapphire Rapids on 2023-01-10. The definition of launch, however, is fairly fluid
Markfw
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So one 96 core Genoa beats 2 60 core SR chips. Sounds about right. Except no power utilization charts to go with it.
Hulk
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If performance is bad then yes, Canon Lake redo.
But if performance is good then possibly just Intel getting some parts out while yields get better.
Performance has been all over the place from barely matching Milan(at core disadvantage 64C vs 60C) to be even with Genoa(at core parity in synthetic Geekbench)
They said they've been in mass production since the end of last year, so at this point it just seems a matter of ODMs rolling out their full product lines. The hyperscalers probably have first dibs.
I recall a few months ago when some rumor monger claimed they wouldn't ramp till H2'23...
Milan-tier sounds about right for typical use cases (i.e. no accelerators, AMX, etc.). Genoa's obviously going to be way better.Performance has been all over the place from barely matching Milan(at core disadvantage 64C vs 60C) to be even with Genoa(at core parity in synthetic Geekbench)
So Sapphire Rapids are estimated to ship in volumes in H2 2023 provided Intel don't encounter any last minute bugs. Way to go, Intel.
At this stage and with MTL delays, I don't believe Intel management has any hopes that GNR & SF are going to ship in times. Intel has been rumored to test 3 Xeon chips at TSMC N3 process, of which should be GNR, SF & IOD? So I wonder is Intel going to ask TSMC's help this round?
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I agree.
But look at this. Some mad lad was able to use two 5995WX on a 2S Motherboard(which is not really a surprise since The TR Pro are rebranded Milan parts)
Would be awesome if someone on this forum would do that for a Genoa TR PRO CPUs
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