Discussion Intel current and future Lakes & Rapids thread

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DrMrLordX

Lifer
Apr 27, 2000
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That's because Comet and Ice were meant to coexist together as part of one generation.
Comet Lake wasn't even supposed to exist at all. It was a necessary evil to keep fresh product on the open market, followed by yet another necessary evil (Rocket Lake).
 

Hotrod2go

Member
Nov 17, 2021
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Comet Lake wasn't even supposed to exist at all. It was a necessary evil to keep fresh product on the open market, followed by yet another necessary evil (Rocket Lake).
necessary evil facilitates the production of good evil like alderlake. :oops: I'm sure your aware of the LGA1700 mounting issues.... what clusterfuck of design that is!
 
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DrMrLordX

Lifer
Apr 27, 2000
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necessary evil facilitates the production of good evil like alderlake. :oops: I'm sure your aware of the LGA1700 mounting issues.... what clusterfuck of design that is!
Well point being, once upon a time there was supposed to be a 10nm desktop product well prior to Alder Lake which never happened. Coffee Lake/Coffee Lake refresh, Comet Lake, and Rocket Lake all had to cover up for that gaping maw in Intel's lineup. So if there was product overlap back then, it's not surprising. That was major fly-by-the-seat-of-your-pants territory for Intel.

LGA1700's mounting issues are a whole 'nother ball of wax.
 

biostud

Lifer
Feb 27, 2003
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Are both ADL and RPL based on the same monolithic chip, and then disabling cores for the different SKU's?
 

coercitiv

Diamond Member
Jan 24, 2014
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Are both ADL and RPL based on the same monolithic chip, and then disabling cores for the different SKU's?
ADL uses two dies for all desktop SKUs: one is 8+8 and one is a considerably smaller 6+0. That's why you don't see efficiency cores anywhere in the i5 and i3 line except for 12600K which uses the 8+8 die.
 
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igor_kavinski

Diamond Member
Jul 27, 2020
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In best case scenarios, how efficient are the E-cores perf/watt compared to zen3?

Single threaded efficiency
1653825537857.png

Multithreaded efficiency
1653825583923.png

E-cores win in ST but lose in MT due to being too weak architecturally.
 

deasd

Senior member
Dec 31, 2013
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Single threaded efficiency
View attachment 62282

Multithreaded efficiency
View attachment 62283

E-cores win in ST but lose in MT due to being too weak architecturally.
If I'm a person who live in the cave and see these data, I would guess the 5800X is a E-core while the another 'E-core' is not....
 
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coercitiv

Diamond Member
Jan 24, 2014
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In best case scenarios, how efficient are the E-cores perf/watt compared to zen3?
In a 1v1 comparison the desktop E-cores always lose in energy efficiency when looking at any meaningful load (except for very light loads). However, that is true while ignoring area difference. As long as the workload scales across multiple cores, at ISO area the greater number of E cores win by virtue of numbers and operating at more advantageous frequencies.

At the same time E core complexes are especially optimized for area efficiency, leading to inconsistent behavior in latency sensitive workloads.

It's a rock, paper, scissors game.
 
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moinmoin

Diamond Member
Jun 1, 2017
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The way E-cores are used as part of ADL under Windows 11 so far makes them not that useful wrt power efficiency. Chips and Cheese did some article in January:





So energy efficiency wise E-cores don't offer any advantage for INT-loads from 3.2 GHz onward and shouldn't be used at all for non-INT loads at frequencies above 3.2 GHz as from that point onward they actually do worse than P-cores.

Personally I wasn't impressed by this at all (especially considering 12th gen chips are tuned to max out cores, thus make the worst possible use of the E-cores) and hope Intel does much better with the following gens.
 

eek2121

Golden Member
Aug 2, 2005
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This is a trend I would like to see. Desktop boards with SO-DIMM support. Would allow for more flexible Mini-ITX designs.
 

Doug S

Golden Member
Feb 8, 2020
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This is a trend I would like to see. Desktop boards with SO-DIMM support. Would allow for more flexible Mini-ITX designs.
I've been using a mini-ITX for about five years now (with an i5-6500) and probably going to update this fall. The main thing I need is dual m.2 slots for mirrored SSDs. If using SO-DIMMs saves enough board space that dual m.2 slots becomes table stakes for mini-ITX boards I'm all for it.
 
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mikk

Diamond Member
May 15, 2012
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The way E-cores are used as part of ADL under Windows 11 so far makes them not that useful wrt power efficiency. Chips and Cheese did some article in January:

So energy efficiency wise E-cores don't offer any advantage for INT-loads from 3.2 GHz onward and shouldn't be used at all for non-INT loads at frequencies above 3.2 GHz as from that point onward they actually do worse than P-cores.

Personally I wasn't impressed by this at all (especially considering 12th gen chips are tuned to max out cores, thus make the worst possible use of the E-cores) and hope Intel does much better with the following gens.

One issue is that Alder Lake only supports one voltage rail for P-cores, E-cores and the Ringbus, as a result the much lower clocked E-cores have to use the same voltage required for the P-cores, this can't be ideal when it comes to the E-cores power efficiency. They surely will sort this out, maybe Raptor Lake mobile is a candidate (new DLVR power delivery), if not I bet Meteor Lake will fix this.
 

moinmoin

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Jun 1, 2017
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They surely will sort this out, maybe Raptor Lake mobile is a candidate (new DLVR power delivery), if not I bet Meteor Lake will fix this.
I sure hope they'll fix this asap. The current behavior would only make sense if the scheduler could prefer E-cores until 3.2 GHz and move affected processes to P-cores once frequency passes that.
 

Markfw

CPU Moderator, VC&G Moderator, Elite Member
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May 16, 2002
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Not trying to be a killjoy, but correctly using the 2 different cores by a scheduler seems to be a very difficult if not impossible. There is no way it could ever equal perfection in all cases, so its a matter of how good, and how much progress is made at what point. And you have multiple OS'es to do this on. I would think it would be better to have all cores the same.
 

DrMrLordX

Lifer
Apr 27, 2000
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Not trying to be a killjoy, but correctly using the 2 different cores by a scheduler seems to be a very difficult if not impossible.
ARM + Android and ARM + iOS have been doing it for years. Though it's hard to know exactly how many performance and efficiency sacrifices are made to facilitate this setup, since efficiency comparisons of heterogeneous core setups vs. homogeneous core setups on those platforms currently don't exist. In any case, mobile devices are quite happy to shut down entire core clusters to save power, which is not something you want to do on a desktop most of the time.
 

moinmoin

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Jun 1, 2017
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ARM + Android and ARM + iOS have been doing it for years.
From a hardware pov they all focused on (mostly essentially fixed to) running at least the little core if not both big and little cores close to the most efficient frequency. Same cannot be said of Intel's current implementation.
 

DrMrLordX

Lifer
Apr 27, 2000
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Same cannot be said of Intel's current implementation.
That is correct. Intel's implementation currently leaves much to be desired. I've toyed with a Snapdragon 845 under different conditions (okay, it was just my old phone lol) and found it to be pretty solid all around, though I must admit, I did not have any points of comparison, such as an equivalent ARM SoC with just "big" cores on it.

Still it did not seem to have any observable hiccups loading different cores appropriately. You would just throw work at it, and it load balanced effortlessly. There were no circumstances that I observed where it would dump workloads just on the "small" cores (and consequently slow them down) when shifting application focus, for example.
 

lobz

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Feb 10, 2017
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If its SPR, then its disappointing. Just yesterday i read, granted on WCCF, that SPR Xeons-W are coming in October, including that mainstream ”hedt” line-up topping at those rumorex 24 cores. So maybe theyre not really and its just another unfounded rumor.
Which Intel story was the last unfounded rumor from Charlie?
 
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Timmah!

Senior member
Jul 24, 2010
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Which Intel story was the last unfounded rumor from Charlie?
I meant that WCCF article about SPR Xeons coming in October might have been based on unfounded rumor.
On topic of Charlie, i dont follow him, so i have no clue how trustworthy he is.
 
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lobz

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Feb 10, 2017
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I meant that WCCF article about SPR Xeons coming in October might have been based on unfounded rumor.
On topic of Charlie, i dont follow him, so i have no clue how trustworthy he is.
Gotcha, I misunderstood your comment 😊
 
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biostud

Lifer
Feb 27, 2003
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Is RPL PL2 going to be the same as ADL?
If so how much do you think performance/watt will increase in MT?
 

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