Discussion Intel current and future Lakes & Rapids thread

[jpiniero]

So the justification for not comparing to the 8130u is based on the assumption that the 8121u does hot have Turbo?

IMO, the 8130U is essentially the replacement of the 8121U. The January 8121U might have had turbo clocks comparable to it, but it's possible Intel reduced it to get quality yield up.

 

[IntelUser2000]

There was however recently a 3dMark 11 score that showed the core not boosting. That's what set off today's debate.

If you are really curious, I suggest asking 3DMark11 guys if the application is capable of detecting the frequencies of unreleased chips without modifications to the code.

IMO, it shouldn't. If you look at patches of monitoring applications like HWInfo for example, they need to add the support in.

I remember looking at GPU-Z and seeing they got the ROP/TMU numbers wrong for the Intel GPUs. I went to their forum and told them. There's sometimes almost no detection going on at all. Because software relies on sensors, if the hardware doesn't send the information, the author is generally guessing.

 

[LTC8K6]

CNL appears to murder KL at SFFT.

 

[IntelUser2000]

Explanation of the sub-benches used in Geekbench.

https://wiki.mikejung.biz/How_to_use_Geekbench_on_Windows_10

 

[CatMerc]

https://twitter.com/jfpoole/status/987423681654620160?s=19

False alarm

 

[epsilon84]

Still some solid gains in IPC, which are good to see after 3 gens of stagnation.

 

[Bouowmx]

Comparison vs i3-6100T (also 3.2 GHz, but smaller LLC: 3 vs 4 MB):
Loses: https://browser.geekbench.com/v4/cpu/compare/3755690?baseline=6246439
Matches: https://browser.geekbench.com/v4/cpu/compare/6480989?baseline=6246439
i.e. inconclusive, or that a good memory kit is enough to negate any IPC difference

 

[mikk]

A stable locked frequency helps too versus Turbo from this ULV.

 

[epsilon84]

A stable locked frequency helps too versus Turbo from this ULV.

Indeed, also apparently 3.2GHz is the max single core turbo on the 8121U, so max all core turbo would be lower than that. Not sure on the exact clockspeeds, though.

 

[mikk]

It didn't even run with 3.2 Ghz says GB4, maximum reported frequency is 3159 Mhz which isn't a guarantee all tests did run on this frequency. I guess CNL is in the range of +3-5% comparable to the transition of SB->IVB. But CNL isn't important this time as a tick, main question is what ICL delivers over the SKL uarch.

 

[jpiniero]

Indeed, also apparently 3.2GHz is the max single core turbo on the 8121U, so max all core turbo would be lower than that. Not sure on the exact clockspeeds, though.

The 8130U's full core turbo is also 3.4, so I imagine the 8121U's FCT would be the same as it's single core max as well. Now what clock speed it was running at during the tests is another story.

 

[mikk]

The 8130U's full core turbo is also 3.4, so I imagine the 8121U's FCT would be the same as it's single core max as well.

Why do you expect that two different SKUs have to be identical in their specified Turbo specs?

 

[jpiniero]

Why do you expect that two different SKUs have to be identical in their specified Turbo specs?

I don't... what I meant was if the SCT is 3.2 the FCT is also likely 3.2 given how the 8130U is. I suspect the final version of the 8121U won't be so generous but we'll have to wait and see.

 

[Yotsugi]

https://twitter.com/david_schor/status/988107149036478464
Ouch.

 

[wilds]

Off topic, but weird to see a RedLetterMedia meme on Twitter about 10nm.

Incredibly disheartening about 10nm. I really hope Intel can deliver some sort of IPC improvement without clockspeed regression.

It may be time to keep focusing on DDR4 memory speed compatibility and see how high it can go. We are about 2 years from DDR5 and I hope we are not still on Skylake IPC for that long...

 

[Yotsugi]

I really hope Intel can deliver some sort of IPC improvement without clockspeed regression.

Apparently CNL has marginal and I have no hopes about ICL what-so-ever.
Ugh.
It's getting from bad to worse.

 

[Eug]

https://twitter.com/david_schor/status/988107149036478464
Ouch.

How accurate is this guy?

So no Cannon Lake Y (or Cannon Lake anything) then?

 

[jpiniero]

https://twitter.com/david_schor/status/988107149036478464
Ouch.

I don't think this is really new news because it appears OEMs aren't interested in Cannonlake. That still wouldn't stop Intel from launching Icelake-Y at the beginning of next year I guess?

I wouldn't be surprised if Whiskey Lake and Coffee Lake Refresh get a full burn though.

Edit: I still think at this point that 10++ will solve the problems for the most part, but that's only really a guess.

 

[Yotsugi]

How accurate is this guy?

He's pretty accurate, being WikiChip's main editor, lul.

So no Cannon Lake Y (or Cannon Lake anything) then?

Looks like we're getting a 2+0 part in a NUC.
That's it.

That still wouldn't stop Intel from launching Icelake-Y at the beginning of next year I guess?

Read the whole reply chain.
It gets worse.

Edit: I still think at this point that 10++ will solve the problems for the most part, but that's only really a guess.

That's 2020 and a gigantic loss of momentum to boot.
It smells like disaster.

 

[mikk]

How accurate is this guy?

So no Cannon Lake Y (or Cannon Lake anything) then?

I don't see anything new there. Cannonlake is basically dead and Icelake is something for 2019, this is nothing new.

 

[LTC8K6]

I don't see anything new there. Cannonlake is basically dead and Icelake is something for 2019, this is nothing new.

Didn't we hear a long time ago that Intel had basically skipped 10nm to go straight to 10+ and then 10++?

 

[mikk]

This is bound to Cannonlake, so yes.

 

[raghu78]

I don't see anything new there. Cannonlake is basically dead and Icelake is something for 2019, this is nothing new.

For ICL to ship in H1 2019 the 10+ process needs to start ramping to HVM in late 2018. The current state of Intel's 10nm process does not inspire much confidence. Charlie has been saying for a long time that Intel 10nm is broken. People thought he was lying but now its obvious that Intel 10nm is a huge mess. CNL was PR launched in late 2017 and Intel did not even mention the Cannonlake SKUs to the world because the chip is so bad that they had to disable the GPU entirely. 2+0 chip with 2C/4T and no iGPU.

https://en.wikichip.org/wiki/intel/core_i3/i3-8121u
https://techreport.com/news/33549/r...c-could-blend-cannon-lake-and-radeon-graphics

Its now obvious that there is going to be negligible 10nm volume from Intel in 2018. The question is now about 2019. If Intel does not ramp 10+ by the end of 2018 then its pretty much going to be a bloodbath for Intel in 2019 and 2020.

 

[Yotsugi]

If Intel does not ramp 10+ by the end of 2018 then its pretty much going to be a bloodbath for Intel in 2019 and 2020.

BK has already prepared the golden parachute by selling like every share he could.
We all know how it will end.

 

[mikk]

For ICL to ship in H1 2019 the 10+ process needs to start ramping to HVM in late 2018. The current state of Intel's 10nm process does not inspire much confidence. Charlie has been saying for a long time that Intel 10nm is broken. People thought he was lying but now its obvious that Intel 10nm is a huge mess. CNL was PR launched in late 2017 and Intel did not even mention the Cannonlake SKUs to the world because the chip is so bad that they had to disable the GPU entirely. 2+0 chip with 2C/4T and no iGPU.

https://en.wikichip.org/wiki/intel/core_i3/i3-8121u
https://techreport.com/news/33549/r...c-could-blend-cannon-lake-and-radeon-graphics

Its now obvious that there is going to be negligible 10nm volume from Intel in 2018. The question is now about 2019. If Intel does not ramp 10+ by the end of 2018 then its pretty much going to be a bloodbath for Intel in 2019 and 2020.

Charlie also said 14nm+++ is coming which won't happen. ICL is in much better shape than CNL ever was based on the leaks. And of course I don't expect ICL-U really available before mid 2019, there is lots of time from now on to improve. And regarding CNL there are rumours something graphics related was broken unrelated to 10nm which may be one big reason why they had to disable the graphics part on the first shipped wave of CNL. It's not even clear if we ever see CNL with graphics enabled.