Discussion Intel current and future Lakes & Rapids thread

[eek2121]

Correct, but, Intel is being forced to use higher clocks & power because they are behind in node development. That's why I found it strange that you're wondering why they clock their designs so high up the V/F curve.

Do you really think this is Intel's 1st choice? They need that to stay competitive. They are being forced to make certain decisions. In other words, they can't clock less in the present circumstances, for top performing SKUs.

Intel has had an addiction to high clocks since the Core 2 came out.

It got even worse with Haswell.

That is why I suspect the gracemont cores in ADL-S will be pushed well past the point of being efficient.

 

[Hougy]

What do you mean? maddie is responding to eek talking about 14nm. 14nm is behind in all metrics, and that's the point. They had to ramp up clocks and power because they were stuck on 14nm. Look how much better the Tigerlake-SFF desktop fares compared to Rocketlake. It's almost at half the TDP for pretty much the same clocks.

And 10nm is twice as dense for Core cores and 2.5x+ dense for Atom/Graphics.

Could you imagine the disaster if we had Rocketlake-U and -H? They'd never calm the crowd after that.

How do you know about these densities increases? I thought we didn't know the transistor counts of the most recent products

 

[Mopetar]

Intel has had an addiction to high clocks since the Core 2 came out.

It got even worse with Haswell.

I think that was just a consequence of them not really doing a major architecture overhaul and stagnating on 4-cores for so long and then the inability to get off of 14nm leaving them with that as the only option. The earliest Core 2 chips didn't really push the clock speeds all that much and even Nehalem was fairly conservative. There were plenty of Phenom chips that clocked similarly.

For whatever reason Sandy Bridge turned out to be an absolute OC monster and let Intel realize the dreams the had with NetBurst and that probably got them a bit addicted to clock speeds again as well. Maybe AMD trying to chase clocks with Bulldozer had them a bit concerned as well, because they knew how much their own marketing had shoved clock speeds at consumers over the years.

 

[Hulk]

Correct, but, Intel is being forced to use higher clocks & power because they are behind in node development. That's why I found it strange that you're wondering why they clock their designs so high up the V/F curve.

Do you really think this is Intel's 1st choice? They need that to stay competitive. They are being forced to make certain decisions. In other words, they can't clock less in the present circumstances, for top performing SKUs.

This is exactly correct. I would add that they are also behind in architecture, which is another reason (need) for the high clocks.

 

[Mopetar]

This is exactly correct. I would add that they are also behind in architecture, which is another reason (need) for the high clocks.

That wasn't really the case up until Zen 3 or maybe Zen 2 if you want to consider mostly multi-core performance in professional apps. Being stuck on 14nm didn't give them anywhere to go even after they moved past limiting their consumer parts to 4C8T without buying a HEDT chip.

Far more of the timeline was Intel being greedy and refusing to do much beyond churn out another x700K with the same 4-cores, a slightly higher clock speed, and some moderate IPC gains.

 

[jpiniero]

Far more of the timeline was Intel being greedy and refusing to do much beyond churn out another x700K with the same 4-cores, a slightly higher clock speed, and some moderate IPC gains.

Then people could have just complained about power consumption earlier, at least on mobile. I used a 6 core Coffee Lake H laptop for work and the fan loves to run on that. You also have to remember that the 6700K was basically not available for like 6 months after it's "launch" because yields weren't that great early on. That's after they cancelled Broadwell-C after starting production.

 

[IntelUser2000]

How do you know about these densities increases? I thought we didn't know the transistor counts of the most recent products.

I don't care about transistor counts. I care about performance, power consumption, and actual size.

There are shots of various chips out there. You can derive density gains from that. They can keep the transistor count secret, but they can't keep die shots secret. You can just open them up and look at them!

 

[gdansk]

Haswell Refresh is where things started to go wrong. 14nm stumbled such that refreshed +500MHz 22nm Haswell was a more compelling desktop product than delayed 14nm Broadwell. It was the largest single generation increase in clock speed and it wasn't even a generation
2011 2600K: 3.8GHz
2011 2700K: 3.9GHz +100MHz
2012 3770K: 3.9GHz
2013 4770K: 3.9GHz
2014 4790K: 4.4GHz +500MHz
2015 6700K: 4.2GHz -300MHz
2017 7700K: 4.5GHz +200MHz
2017 8700K: 4.7GHz +200MHz
2018 9900K: 5.0GHz +300MHz
2020 A900K: 5.3GHz +300MHz
2021 B900K: 5.3GHz

Given estimates of stacked cache Zen 3 I don't think Intel can give up even a few hundred megahertz on Alder Lake if they want to stay competitive on desktop.

 

[mikk]

Meteor Lake is a very late 2023, early 2024 product.

On what this is based on? Or do you refer to a desktop version (which we don't even know if it comes)?

 

[jpiniero]

On what this is based on? Or do you refer to a desktop version (which we don't even know if it comes)?

Desktop K first makes the most sense because of the very low volume and (if necessary) you can get away with not having the IGP. Unless the tile is being dual sourced Meteor Lake is still probally a theoretical product at this point so things could certainly change.

 

[mikk]

Desktop K first makes the most sense because of the very low volume and (if necessary) you can get away with not having the IGP. Unless the tile is being dual sourced Meteor Lake is still probally a theoretical product at this point so things could certainly change.

Mobile first makes sense because it's a new process, just look back to 14nm and 10nm. Also it's basically confirmed from Intel that mobile is first.

 

[eek2121]

Haswell Refresh is where things started to go wrong. 14nm stumbled such that refreshed +500MHz 22nm Haswell was a more compelling desktop product than delayed 14nm Broadwell. It was the largest single generation increase in clock speed and it wasn't even a generation
2011 2600K: 3.8GHz
2011 2700K: 3.9GHz +100MHz
2012 3770K: 3.9GHz
2013 4770K: 3.9GHz
2014 4790K: 4.4GHz +500MHz
2015 6700K: 4.2GHz -300MHz
2017 7700K: 4.5GHz +200MHz
2017 8700K: 4.7GHz +200MHz
2018 9900K: 5.0GHz +300MHz
2020 A900K: 5.3GHz +300MHz
2021 B900K: 5.3GHz

Given estimates of stacked cache Zen 3 I don't think Intel can give up even a few hundred megahertz on Alder Lake if they want to stay competitive on desktop.

Definitely not. Someone at Intel probably had a bad day when that little teaser went out.

They really do need to revamp their chips. Historically, that has helped both AMD and Intel. All large performance/efficiency improvements have come from new core designs.

…although I am curious what Comet Lake on 10nm would look like. 🤣

 

[Hulk]

Haswell Refresh is where things started to go wrong. 14nm stumbled such that refreshed +500MHz 22nm Haswell was a more compelling desktop product than delayed 14nm Broadwell. It was the largest single generation increase in clock speed and it wasn't even a generation
2011 2600K: 3.8GHz
2011 2700K: 3.9GHz +100MHz
2012 3770K: 3.9GHz
2013 4770K: 3.9GHz
2014 4790K: 4.4GHz +500MHz
2015 6700K: 4.2GHz -300MHz
2017 7700K: 4.5GHz +200MHz
2017 8700K: 4.7GHz +200MHz
2018 9900K: 5.0GHz +300MHz
2020 A900K: 5.3GHz +300MHz
2021 B900K: 5.3GHz

Given estimates of stacked cache Zen 3 I don't think Intel can give up even a few hundred megahertz on Alder Lake if they want to stay competitive on desktop.

Others with more knowledge here will comment on my observation but it seems to me as though physics is putting a limit on frequency. At around 5GHz power seems to go crazy.

This is regardless of node size. I know nodes and architecture can be developed specifically for high clocks at the expense of density and/or power but in terms of "sellable" and competitive parts it seems like we have a barrier at 5GHz.

 

[Zucker2k]

Others with more knowledge here will comment on my observation but it seems to me as though physics is putting a limit on frequency. At around 5GHz power seems to go crazy.

This is regardless of node size. I know nodes and architecture can be developed specifically for high clocks at the expense of density and/or power but in terms of "sellable" and competitive parts it seems like we have a barrier at 5GHz.

If by physics, you mean average room temperature, then I've just saved you from knocking your head against walls for answers.

 

[repoman27]

I think your analysis is flawed. Intel serviced their entire CPU lineup in 2018 with 14nm (Cascade Lake, CoffeeLake, Goldmont Plus). And by "entire product lineup" I mean everything from server to workstation to desktop to laptop. Remember the CPU shortages at the time that made it difficult to get i3s, Pentiums, and Celerons? And remember the delays in getting 9900k CPUs to market in quantity?

According to Mizuho, I think the 14nm capacity at that time was around 80 kwpm? 7nm in 2023 will be 1/4 that capacity. There is no way Intel can ship area-equivalent dice in the same quantity that they did in 2018.

On top of that, both Intel 10nm (and variants) and 7nm will be dated nodes by 2023. Intel's 10nm is roughly competitive with TSMC nodes from 2018. Intel's 7nm will be roughly competitive with TSMC nodes from 2020. Not just in density but in perf/watt and perf/area.



That's a big problem for Intel.

Most of your post actually backs up my analysis, I think you just entirely missed my point.

I said that Intel probably needed 85 kwpm to produce 100% of their CPUs. You reinforced that by pointing out that when Intel did try to do everything on one node, they were supply constrained at around 80 kwpm. The actual Mizuho estimate for Intel 14nm in 2018 was 70 kwpm. Furthermore, roughly 7 kwpm on average of 14nm were going to modems for Apple in 2018, ramping to over 15 kwpm in 2019. So 85 kwpm on the leading process is a very generous upper bound for Intel's requirements.

ASML says 1 EUV machine is required per layer per 45 kwpm. Mizuho estimates that Intel will have > 15 EUV machines installed by 2023. Even if Intel's 7nm calls for 20 EUV layers (which seems excessive), they would have enough EUV equipment to accommodate at least 36 kwpm in 2023.

36 is a lot less than 85, however, nothing about Intel's roadmaps would indicate that they have any intention of manufacturing 100% of their CPUs on 7nm in 2023. In fact we know that the lead 7nm products, aside from some percentage of the Ponte Vecchio Xe-HPC compute tiles, aren't planned for release until H2'23. Mizuho's estimate of 20 kwpm may prove to be very close to Intel's average 7nm production in 2023. However, despite the inference that many folks on this forum seem to be drawing from these numbers, a lack EUV of equipment clearly isn't going to be the limiting factor for Intel 7nm. Intel will have enough EUV equipment for at least 36 kwpm, and 36 is a lot more than 20.

Intel is way behind. But the notion that the reason they're behind is because they didn't spend enough on EUV equipment doesn't align with the facts.

 

[Hougy]

I don't care about transistor counts. I care about performance, power consumption, and actual size.

There are shots of various chips out there. You can derive density gains from that. They can keep the transistor count secret, but they can't keep die shots secret. You can just open them up and look at them!

How can you know the density increase from die shots without knowing the transistor counts?

 

[eek2121]

Most of your post actually backs up my analysis, I think you just entirely missed my point.

I said that Intel probably needed 85 kwpm to produce 100% of their CPUs. You reinforced that by pointing out that when Intel did try to do everything on one node, they were supply constrained at around 80 kwpm. The actual Mizuho estimate for Intel 14nm in 2018 was 70 kwpm. Furthermore, roughly 7 kwpm on average of 14nm were going to modems for Apple in 2018, ramping to over 15 kwpm in 2019. So 85 kwpm on the leading process is a very generous upper bound for Intel's requirements.

ASML says 1 EUV machine is required per layer per 45 kwpm. Mizuho estimates that Intel will have > 15 EUV machines installed by 2023. Even if Intel's 7nm calls for 20 EUV layers (which seems excessive), they would have enough EUV equipment to accommodate at least 36 kwpm in 2023.

36 is a lot less than 85, however, nothing about Intel's roadmaps would indicate that they have any intention of manufacturing 100% of their CPUs on 7nm in 2023. In fact we know that the lead 7nm products, aside from some percentage of the Ponte Vecchio Xe-HPC compute tiles, aren't planned for release until H2'23. Mizuho's estimate of 20 kwpm may prove to be very close to Intel's average 7nm production in 2023. However, despite the inference that many folks on this forum seem to be drawing from these numbers, a lack EUV of equipment clearly isn't going to be the limiting factor for Intel 7nm. Intel will have enough EUV equipment for at least 36 kwpm, and 36 is a lot more than 20.

Intel is way behind. But the notion that the reason they're behind is because they didn't spend enough on EUV equipment doesn't align with the facts.

Way behind TSMC to be sure, but Intel and AMD are on a similar process currently on mobile and server. They will both be on a similar process on desktop later this year and that will continue to be the case until this time (or later) next year when AMD launches Zen 4.

Assuming no delays (lol), Intel will be behind AMD for 2H 2022 - 1H 2023, but they will have the node advantage over AMD for late 2023 - 2024. AMD is expected to move to 4nm or 3nm in late 2024 last I read, and if Intels claims are true, AMD will only have a slight advantage at that point, if they have one at all.

None of this includes any factors such as optimizations that Intel normally does between shrinks.

So I am not terribly concerned with either AMD or Intel being able to compete, because both have a decent roadmap.

EDIT: …and everyone is behind Apple. 🤣

 

[repoman27]

How can you know the density increase from die shots without knowing the transistor counts?

Because pretty much everything is based on a handful of standard cells and SRAM bit cells. If you know the design rules, either as disclosed by the foundry or observed using a microscope, then you know how dense the process is on average. The actual transistor count isn't really that important, and there are plenty of reasons why a manufacturer might opt for a layout that isn't at the maximum density that the process will permit. Performance and power are mostly determined by certain physical characteristics of the transistors themselves, which can be measured and tend to be quite uniform for any given process.

That's probably not a very good explanation, but if you read any of David Schor's writing over at WikiChip, you'll see just how much can be gleaned from the publicly available data.

 

[DrMrLordX]

Most of your post actually backs up my analysis, I think you just entirely missed my point.

Ehhhhhh

The actual Mizuho estimate for Intel 14nm in 2018 was 70 kwpm.

Okay, I knew it was somewhere in that ballpark.

ASML says 1 EUV machine is required per layer per 45 kwpm. Mizuho estimates that Intel will have > 15 EUV machines installed by 2023. Even if Intel's 7nm calls for 20 EUV layers (which seems excessive), they would have enough EUV equipment to accommodate at least 36 kwpm in 2023.

Somehow Mizuho is estimating 20 kwpm with that data. So. I would say "we'll see" except it will take an industry observer like Mizuho to give us the post-mortem on how many 7nm wafers Intel manages to produce two years from now. We're also not looking at yields, either.

36 is a lot less than 85, however, nothing about Intel's roadmaps would indicate that they have any intention of manufacturing 100% of their CPUs on 7nm in 2023.

I don't know how many times we have to go over this:

Intel producing products on 10nm in 2023 is a disaster.

It is not a competitive node now, and it won't be two years from now.

 

[gdansk]

From any of the leaked Alder Lake roadmaps was there anything about Xeon Alder Lake on a hypothetical W680? I'm wondering if they'll keep ECC segmented from consumers.

Edit: Looks like yes:

https://twitter.com/x/status/1382966601654276100

Disappointing.

 

[DrMrLordX]

Alder Lake isn't making it beyond desktop/mobile (nor will Raptor Lake). I thought that was already known? Xeons will be IceLake-SP, Sapphire Rapids, and then Granite Rapids. The dates from that slide are interesting though. Eagle Stream has no platform details whatsoever, and Intel is somehow claiming that IceLake-SP is available now for 1P "Expert" Workstation customers? Last time I looked, OEMs like Dell had IceLake-SP rackmounts available in August which is definitely not Q2 2021. And no word on workstation availability. I can't find C621A systems anywhere (C621 hosts Cascade Lake-SP).

@gdansk I'm sure your post is at least somewhat related to the movement to deliver ECC to the masses, and that maybe you were hoping Intel would change their ways due to their recent losses in revenue and market share. Intel isn't the kind of company to do that though. Not yet.

 

[gdansk]

By Xeon Alder Lake I mean the low tier Xeons which are basically just the desktop chips with ECC support (like W-1290 and W-1390). I was hoping they'd stop segmenting them but if that roadmap is real then it seems artificial segmentation will continue.

 

[coercitiv]

if that roadmap is real then it seems artificial segmentation will continue.

death, taxes, and artificial segmentation.

 

[repoman27]

Ehhhhhh



Okay, I knew it was somewhere in that ballpark.



Somehow Mizuho is estimating 20 kwpm with that data. So. I would say "we'll see" except it will take an industry observer like Mizuho to give us the post-mortem on how many 7nm wafers Intel manages to produce two years from now. We're also not looking at yields, either.



I don't know how many times we have to go over this:

Intel producing products on 10nm in 2023 is a disaster.

It is not a competitive node now, and it won't be two years from now.

Actually, I was factoring in completely realistic estimates for yields, cycle times, and which fabs would be up and running with EUV equipment in 2023. Mizuho will never give you a post mortem, because the sole purpose of analysts like Mizuho is to move stock prices for personal gain. Good analysts provide accurate past performance data combined with estimates that appear entirely plausible but in the end are biased towards their and/or their clients' positions. The source for half of the data in the first two tables and the entirety of the information contained in the third table is listed simply as "Mizuho Securities Equity Reasearch Estimates". That means they made it up themselves. Now they do look like pretty solid, well informed estimates to me, but my first instinct was to sanity check their numbers, not to treat them as gospel.

And I'm not sure why you think "we" are going over this repeatedly. Intel producing products on 10nm in 2023 is a reality, full-stop. You're free to feel any way you like about it. I never meant to address that one way or another. When I said, "I don't see any problem here," that was only in regards to whether Intel would have enough EUV equipment to execute their roadmaps as they currently stand.

Oh, and don't forget Intel has also inserted Emerald Rapids in between Sapphire and Granite. So another round of 10nm that will be shipping in 2023. Intel is seriously struggling—I'm not arguing against that in any way.

 

[LightningZ71]

I still don't find it to be such a horrible thing for Intel to be using 10nm in 2023 or even 2024. 2023 is six quarters away, that's not a huge amount of time. I can almost guarantee that AMD will be producing products in 2023 that will be using TSMN N7/N6 in at least some parts. Why is it outlandish, or a tragedy, for Intel to be using a roughly equivalent node in some of their parts?

We know that Intel is talking about products that use multiple nodes, just like AMD does today. We know that Intel will continue to produce parts all up and down the stack, just like AMD does. AMD still produces Dali on GF 14/12LP equipment, is that a tragedy? Why can't Intel be producing low end laptop parts on 10sf in six quarters? Why can't they be making their equivalent of an IO die on it? Why can't they make one of their laptop processor packages that embeds the chipset, which can be 10sf, with a leading edge CPU?

10sf/esf for SOME products in six quarters is not a horrible thing.