This article details Intel's semiconductor process technology history for research and posterity.
en.wikichip.org
dude you skimmed through just to find a single misspoken or mistyped error to point it out when it was obvious i wasnt trying to say 10nm wasnt late. and then just linking a site without even a single word.
redacted
did i not know that the deadline for 10nm was past? yes. yes i did.
why did i say it then?
part of it was poor phrasing on my part and leaving out some words.i was trying to look past a binary state of being, of either late or on time. i was trying to say that THE PROBLEM with 10nm wasnt in being late, but that it had only about half the normal benefits of a new node while at the same time not having the most important one from the chip makers standpoint. and that is the number of transistors produced per litho machine.
same with tsmc 7nm. amd needed the performance more than intel. they were doing well but really needed an advantage. and all they had to trade was production numbers which amd had too much of anyway if the prices of last years models are any indication
amd didnt have large numbers of customers with huge quotas to fill for cpus. if amd made and sold a million chips then amd made and sold a million chips. great!!! if amd made and sold 2 million 12nm chips , but they were just a bit behind intel and they had half of them left over to sell for clearance then how does that help amd?
but intel makes way over 90% of the cheap business class oem desktops, and around the same number of simpe to high end laptops. at light to moderate workloads, most of the time spent on a laptop, intel 14nm cpus actually use less power than amd 7nm because of the all the power savings features built. for chrome, youtube etc the igpu does most of the work and uses 1.5 watts doing it.
the consistancy of 14nm (and dual patterning) also means those low end i3 and i5 systems, lets say a i5 9400 system, will have higher clocks, all core etc, because these low end chips are where most of the worst dies go.
quad patterning and specifically 7nm is half the reason amd went with chiplets. the other half is the ability to make hedt chips from desktop die. with 14nm and 12nm, desktop parts only needed to be a single die. with 7nm it had to be 3. oh and btw all that stuff about things that dont scale well are better off on 14nm etc, maybe theres some truth to it but thats not the real reason. the real reasons are because they still had to make something at glofo because of wafer supply aggreements, to make sure they used as little of this expensive, slow to make, inconsistant, silicon. oh and for the same reason stayed with off die memory controllers way back in the day after amd had already put it on the die, so they could use different mem controllers (or io dies in amd's case)
they made a great product from it, im not saying they didnt. it was a great use of what they had and showed a lot of forethought. but mostly it was a very broke company that had been bleeding for years throwing a few million shares of amd stock worth 1 dollar at a genius of the cpu world and saying if you get the company to 30 dollars a share you have made 30 times what we paid you. first gen ryzen was just 2 die, the 8 core and the apu. same with second gen. they did a whole lineup with those 2 die and really they only needed the one die. all the costs of making masks and this and that, just one die
and with zen 2 its just one core die and one io die that also double as a chipset. brilliant.
but they traded off more for that then people realize. extra latencies, an L3 cache pool that is functionally much smaller than it looks. i mean a 3700x has double the cache of the 2700x but the way cache is laid out its really more like 2 pools of 4 and even those 2 pools are subdivided into 2 subsets. to get similar performance of a 9900k with 5ghz or even 4.9ghz in most things it took double the cache. and now L3 cache alone takes up 2/3 to 3/4 of the core die to overcome the layout of all this and the lower cache speed of the L3.
oh and that pesky consistancy spread of clocks probably effects the speed that the L3 cache will run at so the slowest speed of cache slice is the cache speed but now its way more variable from chip to chip. just pump a bit more voltage into it when under load, and cache uses a lot power as well.
being on 7nm while intel is on 14nm means that amd wont suffer from transistors that had to be thrown at the doubling L3 cache for now, but once intel get 10nm and beyond moving all those character points they put into cache, intel will be able to put into something else. L2 is the cpus local cache. L3 is there to tie the chip together. but instead its all so inconsistant.
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