• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

Question AMD Rembrandt/Zen 3+ APU Speculation and Discussion

Page 31 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

izaic3

Member
Alright, so we've had some leaks so far. I don't know if any of it's been confirmed yet, as it's pretty early, but here is what I've surmised so far (massive grain of salt of course):

If if turns out to have RDNA 2 and 12 CU, I could see iGPU performance potentially almost doubling over Cezanne.

If I've made any mistakes or gotten anything wrong, please let me know. I'd also love to hear more knowledgeable people weigh in on their expectations.
 
Last edited:
Who said anything about 90W+? Raphael-H is 35-65W. It also includes a GPU. Rembrandt covers most of the 14-54W space, Raphael-H would likely be at the top end. Alder Lake is likely going to be much faster than Rembrandt for CPU workloads, so AMD needs Raphael-H to counter.
Raphael-H is designed to be used in laptops with dGPUs. You won't find it in even a single standalone design. Also, the iGPU barely deserves to be called an iGPU. For the market it's focused on, the only thing that matters from the APU itself is CPU performance, and Raphael will bring just that.

Most thin and light designs that your average laptop buyer is interested in covers a thermal range of 12-28W, depending on the device. There are a couple of higher end devices that push these -U tier chips to ~35W, but those are the exception, not the norm. You can pretty easily attribute well over half of all laptop sales to this market with absolute ease, I'd reckon it's actually more like a 70:30 split even. Be it the 2+8 die or the 6+8 die it's competing against, I'm confident that the only weakness of Rembrandt for these markets is going to be the single core performance.

I'm not elaborating any further on that statement for now though. Just wait the last month for CES, maybe earlier if the full slide deck gets leaked.
 
I think we'll have to wait a bit after CES though. IMO the bigger unknown is the Alderlake performance at the 15/28W level and that is probably going to need some independent review to close in on the performance effects on specific benchmarks.
 
Very unlikely to happen. The DFI GHF51 you linked there uses a 2c/4t Dali die, that's the smallest possible Zen die that exists right now. 2x CCD + 1x cIOD will take vastly more space than that.
About Dali, do we have any news about Pollock (4.5W version)?
 
I think we'll have to wait a bit after CES though. IMO the bigger unknown is the Alderlake performance at the 15/28W level and that is probably going to need some independent review to close in on the performance effects on specific benchmarks.
For 15/28w the jury is still out. But for 45w it is highly probable that ADL-P will beat RMB-H hands down.
Marc Sauter from Golem.de simulated an 6+8 in his M1 Max test. Below you can have a look at the numbers.
 
For 15/28w the jury is still out. But for 45w it is highly probable that ADL-P will beat RMB-H hands down.
Marc Sauter from Golem.de simulated an 6+8 in his M1 Max test. Below you can have a look at the numbers.
ADL will beat cezzane and may be better than RMB cpu wise but it's unlikely that it will even come close in terms of igpu. the articles i have seen estimate that ADL will be around 25% better than a 5800H as far as gaming while RMB is supposed to be 83% faster than the 5800H graphics wise.
 
ADL will beat cezzane and may be better than RMB cpu wise but it's unlikely that it will even come close in terms of igpu. the articles i have seen estimate that ADL will be around 25% better than a 5800H as far as gaming while RMB is supposed to be 83% faster than the 5800H graphics wise.
Yeah, correct. I was addressing the CPU side specifically. I thought that was clear from the context. Because, otherwise why position Raphael-H with its tiny GPU against ADL-P? 😉
 
Yeah, correct. I was addressing the CPU side specifically. I thought that was clear from the context. Because, otherwise why position Raphael-H with its tiny GPU against ADL-P? 😉
Cezanne also didn't scale that well with higher power. Eventually losing out to even tiger-h, admittedly outside of normal laptop power draws but that doesn't matter if you want some benchmark wins.
Raph-H looks like it will also be positioned against alder ADL-Sbga in h55 tier. A halo part from intel with a smaller igpu 32eu also.

OEMs are always relunctant to make laptops based on such platform that is originally designed for desktop.
Hopefully Raph-h is just the chiplet and io die wired to the fp7 bga 'socket' so it's a relatively easy swap out for oems.
 
Cezanne also didn't scale that well with higher power. Eventually losing out to even tiger-h, admittedly outside of normal laptop power draws but that doesn't matter if you want some benchmark wins.
Raph-H looks like it will also be positioned against alder ADL-Sbga in h55 tier. A halo part from intel with a smaller igpu 32eu also.


Hopefully Raph-h is just the chiplet and io die wired to the fp7 bga 'socket' so it's a relatively easy swap out for oems.
The mess for oem's could be far more than just socket.
 
Not sure if the 2x CCD + 1x cIOD would even fit on it. AM4/5 package size is 40x40mm while FP7 appears to be 25x35mm.
Do you know what the most limiting part of putting die to substrate?
The IO wiring will goto the IO die that is smaller than rembrandt, chiplets are mostly wired to io die.
So the difference is power delivery that is in theory easier to route on substrate and getting a few more substrate layers on a higher margin cpu wouldn't be out of the question and copper pillar solder bump on chiplets makes it easy to adjust die heights now.
I don't think there's a hard blocker on the package size to my knowledge, just a bit of money.
 
Are you basing the AM4 package size on the existing 14/12nm IOD and 7nm CCDs? Won't the discussed products be featuring a physically smaller N5 based CCD and N7/N6 based IOD? I don't think that the package size will be a limiting factor.
 
My "not sure" wasn't a statement that I'm sure it doesn't fit, it was a lazy mention that I'm genuinely unsure it would fit considering the package size is significantly smaller and that I'm not going to make the calculations necessary to make a hard statement either way. 😉
 
Yeah, correct. I was addressing the CPU side specifically. I thought that was clear from the context. Because, otherwise why position Raphael-H with its tiny GPU against ADL-P? 😉
i am always confused about things like this-does CPU performance at this level even make that much of a difference for the casual user/gamer? if ADL does beat RMB in this area, would it even be noticeable in real world games & applications or is it just about synthetic benchmarks?
 
@LightningZ71
The size of the Raphael CCD is not that much different from Vermeer according to the most current information. And the IOD size might also not gain a lot if it still uses IFoP were you are limited in terms of contact density.

@ahimsa42
Well, this is a whole new kind of discussion where answers might heavily differ depending on who you ask. I for myself feel that my 4700u has "enough" performance. But a lot of people will emphasize 5% one way or the other.
 
Reviewing package images of the AM4 package as used for Zen3, there is a good bit of space outside of the capacitor ring that is largely unused. There is also excess space between the CCDs and IOD that can be reduced for a tighter package. I don't propose that AMD is intentionally wasting space here, as, when you look at the bottom of the package, it's obvious that the size is to allow their preferred pin grid array pitch for the socket. Using a BGA package, they should be able to shrink the existing AM4 package down by at least 20% just by using a tighter grid pitch and placing the components more closely together, though I concede that this might require an additional package layer or two. The same should be the case for the BGA package for a 2 CCD mobile product. It will certainly require tighter tolerances and more expense, but, the premium nature of the product should provide for sufficient ASP to cover the cost increase.
 
Reviewing package images of the AM4 package as used for Zen3, there is a good bit of space outside of the capacitor ring that is largely unused. There is also excess space between the CCDs and IOD that can be reduced for a tighter package. I don't propose that AMD is intentionally wasting space here, as, when you look at the bottom of the package, it's obvious that the size is to allow their preferred pin grid array pitch for the socket. Using a BGA package, they should be able to shrink the existing AM4 package down by at least 20% just by using a tighter grid pitch and placing the components more closely together, though I concede that this might require an additional package layer or two. The same should be the case for the BGA package for a 2 CCD mobile product. It will certainly require tighter tolerances and more expense, but, the premium nature of the product should provide for sufficient ASP to cover the cost increase.
Physically it works in theory.
Then would raph-h work with 1140 pins.
AMD wanting additional io over rembrandt could mean a different socket which I think is more of an AMD business decision unfortunately. As people have been saying, the harder it is for oems to implement the less we'll see.
 
Back
Top