Question Zen 6 Speculation Thread

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poke01

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Mar 8, 2022
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For actual real world loads that need these operations (not Geekbench), I believe (we will see) the iGPU in Zen 6 will outperform AMX in Intel CPU's.
sometimes i feel as though we repeat this a lot but here we go again

for matrix workloads SPEED: GPU > CPU
for matrix workloads BOARD COMPATIBILITY: CPU > GPU

i don't get why this has be a competition. Both can be useful but for 99% of usecases GPU wins.
Why? cause speed always wins
 

OneEng2

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Sep 19, 2022
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Depends on the case. For example in 9950x case the gpu will be slower than the cores;) but if you have big enough matrix and big enough gpu, then for sure.
I guess the question I am posing is: Will next gen iGPU's be powerful enough that they render APX pointless?

I am currently of the belief that they will.
 

MS_AT

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Jul 15, 2024
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Will next gen iGPU's be powerful enough that they render APX pointless?
Depends on the SKU i guess. I wouldn't count on that for direct desktop chips replacements, the igpu there is not meant for anything more than displaying desktop and handling hw video decode. The premium mobile parts are supposed to be GPUs with attached CPUs, so there for sure;)

Also keep in mind that with AMX you don't leave the CPU, it might be quite competitive with pushing stuff to dGPU for right problem sizes. Or it can be used to pump Geekbench scores. Seeing people obsess over GB or CB it makes sense from marketing point of view ;)
 
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reaperrr3

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May 31, 2024
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AMX

RDNA5 likely, but since AMD appear to plan to shift crappy RDNA35 for years to come that might be a problem, Intel will ship nvidia iGPUs.
I suspect that AMD will simply (begrudgingly) price Medusa Premium (with AT4) a bit lower than originally planned if they have to, and that's that.
RDNA3.5-only SoCs are mostly for office users or to be paired with a dGPU.

Besides, NVL will still be Xe3(P), I wouldn't expect NV iGPUs before 2028/2029 and that's probably close to the release of the Medusa base SoC's successor with RDNA5+, nvm that it'll probably have AMX via Zen7, too.

AMD's choice to stick with RDNA3.5 for mainstream looks wrong, but more so over its anemic gaming perf vs. the bigger Intel Xe3(P) iGPUs.
Not sure if putting only 8 CUs into the Medusa base SoC was a good idea, regardless of higher clocks.
 

adroc_thurston

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Jul 2, 2023
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I suspect that AMD will simply (begrudgingly) price Medusa Premium (with AT4) a bit lower than originally planned if they have to, and that's that
No, it's a discrete compete part at discrete prices.
AMD's choice to stick with RDNA3.5 for mainstream looks wrong, but more so over its anemic gaming perf vs. the bigger Intel Xe3(P) iGPUs.
Not sure if putting only 8 CUs into the Medusa base SoC was a good idea, regardless of higher clocks.
Cost cost cost cost cost.
 

Joe NYC

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Jun 26, 2021
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I suspect that AMD will simply (begrudgingly) price Medusa Premium (with AT4) a bit lower than originally planned if they have to, and that's that.
RDNA3.5-only SoCs are mostly for office users or to be paired with a dGPU.

Besides, NVL will still be Xe3(P), I wouldn't expect NV iGPUs before 2028/2029 and that's probably close to the release of the Medusa base SoC's successor with RDNA5+, nvm that it'll probably have AMX via Zen7, too.

AMD's choice to stick with RDNA3.5 for mainstream looks wrong, but more so over its anemic gaming perf vs. the bigger Intel Xe3(P) iGPUs.
Not sure if putting only 8 CUs into the Medusa base SoC was a good idea, regardless of higher clocks.

Medusa Point with RDNA 3.5 would have been a good compromise, if it shipped early (unimpeded by availability of N3P). And then,, if it was succeeded with a refreshed base model with RDNA5 (of similar size).

It only looks bad if Medusa ships late and then there is no refresh of it until Zen 7.

The only saving grace would be if AMD can substantially shrink the die size (from Kraken), be cheaper to make than PTL, with good power efficiency and good CPU performance improvement, noticeably ahead of Panther Lake.
 

adroc_thurston

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Jul 2, 2023
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Medusa Point with RDNA 3.5 would have been a good compromise, if it shipped early (unimpeded by availability of N3P). And then,, if it was succeeded with a refreshed base model with RDNA5 (of similar size).
Graphics wank is irrelevant.
CPU perf and BL is what makes or breaks a mobile part.
The only saving grace would be if AMD can substantially shrink the die size (from Kraken), be cheaper to make than PTL, with good power efficiency and good CPU performance improvement, noticeably ahead of Panther Lake.
PTL is a meme. Forget that it exists.
 
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OneEng2

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Cost cost cost cost cost.
That's twice in a week I am forced to adamantly agree with you adroc ;).
The only saving grace would be if AMD can substantially shrink the die size (from Kraken), be cheaper to make than PTL, with good power efficiency and good CPU performance improvement, noticeably ahead of Panther Lake.
I think that just about everything will be cheaper to make than PTL.

It kinda looks like PTL is going to have enough trouble competing with AMD N4 Zen 5 mobile products from the latest benchmarks I have seen.

Of course, that's a good thing for AMD considering they aren't releasing anything for mobile for a hot minute yet, so that is likely the competitive landscape for a few quarters.
Having a regular mobile platform based on 4-5 years old IP surely sounds cheap.
Yep. They kept VEGA around forever too ;). I think it really comes down to "its good enough for most users".
 
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basix

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Oct 4, 2024
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Cost cost cost cost cost.
You have a relatively large SoC. Let's say 150mm2 in N3P. Adding a little bit of Die area for potentially 2x gaming performance (or use less CU with the same performance to save Die area) and including RT and FSR4+ much more than 2x would be a decent win in my opinion. And then the super duper mega important topic of DNN acceleration, where RDNA5 is much more capable than RDNA 3.5. Isn't AMD an AI company now ;)
 

adroc_thurston

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You have a relatively large SoC. Let's say 150mm2 in N3P. Adding a little bit of Die area for potentially 2x gaming performance (or use less CU with the same performance to save Die area) and including RT and FSR4+ much more than 2x would be a decent win in my opinion. And then the super duper mega important topic of DNN acceleration, where RDNA5 is much more capable than RDNA 3.5. Isn't AMD an AI company now ;)
You think like a consumer.
"2x gaming perf" is not a thing without doubling the SoC power anyway.
 
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OneEng2

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You have a relatively large SoC. Let's say 150mm2 in N3P. Adding a little bit of Die area for potentially 2x gaming performance (or use less CU with the same performance to save Die area) and including RT and FSR4+ much more than 2x would be a decent win in my opinion. And then the super duper mega important topic of DNN acceleration, where RDNA5 is much more capable than RDNA 3.5. Isn't AMD an AI company now ;)
Basic engineering principle "You don't get something for nothing".

I can't damn or praise AMD's product mix decisions. I would need lots of information I don't have. I can't deny your claims, but point out that gamers don't account for the majority of sales OR the majority of profits. Not even close. They are a sliver.

AMD has obviously decided that the gamers product would need discrete GPU (which they also sell .... imagine that ;) ).
 
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marees

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Basic engineering principle "You don't get something for nothing".

I can't damn or praise AMD's product mix decisions. I would need lots of information I don't have. I can't deny your claims, but point out that gamers don't account for the majority of sales OR the majority of profits. Not even close. They are a sliver.

AMD has obviously decided that the gamers product would need discrete GPU (which they also sell .... imagine that ;) ).
amd stopped discrete gpus for lsptops.

laptops with strix halo are moving tiny volumes

but the halo laptops/NUCs have extremely high margin because of AI.

AI related profitability will continue to remain high — Open AI not expected to become bankrupt until atleast zen 7

so we can expect medusa premium to have healthy profit margins. what is the max lpddrr5x memory supported on 128 bit? with deepseek level of optimizations & advancements in ROCM, the medusa premium (which is effectively a steam machine class of hardware) should sell for much more due to a large unified RAM

Check this tweet

 

OneEng2

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Surely, Zen6 will reach 6 GHz.
And Zen7 will reach 7 GHz.

For da memes!!!
In all fairness, 6Ghz for Zen 6 seems quite achievable. 7Ghz for Zen 7 feels more like a pipe dream for several reasons:

1) Zen 6 desktop gets a double die shrink from Zen 5
2) Zen 5 is already at 5.7Ghz boost speed (6Ghz doesn't seem out of the question for 2 die shrinks)
3) Zen 7 will likely use A14. This is an optimization of N2 really. There will be improvements to be sure, but not on the same scale as N4P to N2.

I wouldn't be surprised to see Zen 6 clock at 6.3Ghz .... but ONLY if Intel puts up some real competitive figures with NVL. Otherwise, AMD will back off of the clocks and go for yields and profit, not pushing max clocks.
 

adroc_thurston

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3) Zen 7 will likely use A14. This is an optimization of N2 really
wrooooooooong it's a full node shrink.
with extra stuffs (SRAM bitcell is shrinking for the first time in eons).
I wouldn't be surprised to see Zen 6 clock at 6.3Ghz .... but ONLY if Intel puts up some real competitive figures with NVL. Otherwise, AMD will back off of the clocks and go for yields and profit, not pushing max clocks
lmao dawg AMD gives squat about Intel.
 

OneEng2

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wrooooooooong it's a full node shrink.
It's no different than N4 was from N5. Not a full node shrink, just a refinement of the N2 process that is possible due to process maturity and equipment tweaks to N2.
lmao dawg AMD gives squat about Intel.
Of course not. They also don't care about yields or profit. They only "give a squat" about providing the max clock speeds they can attain on a given process and cpu design :rolleyes:.
 

Makaveli

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amd stopped discrete gpus for lsptops.

laptops with strix halo are moving tiny volumes

but the halo laptops/NUCs have extremely high margin because of AI.

AI related profitability will continue to remain high — Open AI not expected to become bankrupt until atleast zen 7

so we can expect medusa premium to have healthy profit margins. what is the max lpddrr5x memory supported on 128 bit? with deepseek level of optimizations & advancements in ROCM, the medusa premium (which is effectively a steam machine class of hardware) should sell for much more due to a large unified RAM

Check this tweet

would be nice but don't see them going from 32GB on consumer straight to 64GB.

will probably see 36GB or 48GB next.

If they went straight to 64GB on consumer

1769713925466.png
 

marees

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would be nice but don't see them going from 32GB on consumer straight to 64GB.

will probably see 36GB or 48GB next.

If they went straight to 64GB on consumer

View attachment 137581
maybe not on the discrete gpu (50xt)

but the medusa premium is like a mini strix halo. you see halo NUCs selling with 128gb unified ram. likewise the medusa premium NUCs (with the 50xt attached) will also come with atleast 64gb unified RAM
 
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