Question Zen 6 Speculation Thread

[Abwx]

Nice. How about a score?

70k-73k pts for 200-230W.

~45% power savings per core at same freq vs N4P. You have 50% more cores.

0.55 x 1.5 = 0.82x the power at 1.5x the perf and same IPC, since there should be 11% better IPC this yield 0.825 x 1.11x = 0.92x the power for 1.5 x 1.11 = 1.665x the perf.

At the end at same 200W power thus should be about 1.7x the perf, and about 1.75x at 230W.

 

[Josh128]

At the end at same 200W power thus should be about 1.7x the perf, and about 1.75x at 230W.

At 24 cores, each "supposedly" capable of ~6GHz, theres no way you are only leaving 3% performance on the table at 15% less power. You are looking at 8-10%+. Thats why I believe theres zero chance they limit it to 200W, especially with 52C infinite wattage Nova Lake looming.

 

[Abwx]

At 24 cores, each "supposedly" capable of ~6GHz, theres no way you are only leaving 3% performance on the table at 15% less power. You are looking at 8-10%+. Thats why I believe theres zero chance they limit it to 200W, especially with 52C infinite wattage Nova Lake looming.

If 6GHz happen that will be peak ST frequency or so, the rest of my post is unchanged since we re starting with 0.55x the power at same frequency, so 1.75x at 230W and eventualy 1.8x if things turn a little better than expected.

Edit : at 6GHz they could claim about 15% better ST perf, wich is likely what they are targeting.

 

[naukkis]

But now that 11950X (or whatever it's called) will be 24 cores, 485K (or whatever it's called) would lose bad in high nT productivity. The only response Intel could possibly have is either accept nT productivity defeat by a wide margin, or add a second compute tile and bring core count up to 48 cores.

That's not straightforward conclusion. Doesn't you check what Intel is bringing into table. That Nova lake 24c tile will bring 144MB L3-cache on fast interconnect - 50% more LLC than todays AMD X3D-versions. Non-x3d Zen6 versions will have tough time on MT performance even with their threads advantage. Intel really put some silicon into game to challenge best AMD can offer - and with those specs performance will be good or Intel screwed badly.

 

[OneEng2]

You aren’t factoring power into this equation.

If Intel and AMD have similar power limits, Intel will have half the effective amount of power available to each core.

That is a great point. Will all those cores be able to operate within the power envelope?

I'm curious for the 6 to 7GHz people out there how many will be claiming over 6GHz in this actual real world example for Zen 6? Even if you shut down 8 cores and made it apples-to-apples what do you think for frequency and score?

Current Zen 5 9950X tickles the upper limit of the socket under full load and your sample runs ~4.7Ghz all core. Clearly power limited.

I suspect that Zen 6 will run all cores on highly threaded workloads like CB23/24 (50% more cores). I think the process will allow 50% more cores to run at about the same clock frequency .... so 4.7Ghz but the score will be ~%60 higher than Zen 5 (added 10% for IPC and bandwidth improvements in Zen 6).

Intel... "Been there. Done that. 20 years ago."

On paper anyway.

"Tagzen"? "Ryjus"?

 

[gdansk]

That's not straightforward conclusion. Doesn't you check what Intel is bringing into table. That Nova lake 24c tile will bring 144MB L3-cache on fast interconnect - 50% more LLC than todays AMD X3D-versions. Non-x3d Zen6 versions will have tough time on MT performance even with their threads advantage. Intel really put some silicon into game to challenge best AMD can offer - and with those specs performance will be good or Intel screwed badly.

For various reasons - namely MTL-S not shipping, ARL-S not being remotely as good as it should be on paper and RPL-S immolating itself many people have an implicit assumption that "Intel screwed badly" has happened and will happen.

 

[naukkis]

For various reasons - namely MTL-S not shipping, ARL-S not being remotely as good as it should be on paper and RPL-S immolating itself many people have an implicit assumption that "Intel screwed badly" has happened and will happen.

But as this forum is full of spec speculation that Nova lake spec is more than anyone even dared to wish loudly. With those specs manufacturing process has to fail badly to not found some serious performance. This is absolutely some CPU for desktop enthusiasists that Intel has newer before offered. Yeah it's possible that AMD will bring something that shames that cpu badly - but this time Intel has left nothing to table but is really bringing all performance they could offer with their silicon. Has to give some credit to guy which made such a design to happen - I believe that this design is coming from spec nerd being CO so nobody dare to spec down his visions.

 

[adroc_thurston]

But as this forum is full of spec speculation that Nova lake spec is more than anyone even dared to wish loudly

It's just 2t.

 

[gdansk]

With those specs manufacturing process has to fail badly to not found some serious performance.

Hmm, no all it takes for it not be interesting to most people is Intel's first big L3 being decently slower than AMD's 4th iteration of big LLC.

 

[naukkis]

Hmm, no all it takes for it not be interesting to most people is Intel's first big L3 being decently slower than AMD's 4th iteration of big LLC.

But why this forum takes it as known already? Spec-wise Intel seem to be doing right things to their LLC - and topping of cake is that they are also making it to be giant on top models. And AMD is doing 3d-stacking of L3 which brings its problems to the table. Intel doesn't, they are just wasting enormous amounts of silicon space to make ultimate cpu. They aren't doing anything that should be lowering performance.

 

[gdansk]

But why this forum takes it as known already? Spec-wise Intel seem to be doing right things to their LLC - and topping of cake is that they are also making it to be giant on top models. And AMD is doing 3d-stacking of L3 which brings its problems to the table. Intel doesn't, they are just wasting enormous amounts of silicon space to make ultimate cpu. They aren't doing anything that should be lowering performance.

I think there are a lot of good reasons but most of them stem from AMD's current domination of Intel in games. And leading in SPECint 1T at the same clock rate even when they have 1/3rd the L1 per core, 1/3rd the L2 per core.

But anyway, if you want to assume bigger cache always wins go for it. We're all assuming. I assume whoever has the better core will win sales regardless of concern about core count and cache sizes.

 

[exquisitechar]

But why this forum takes it as known already? Spec-wise Intel seem to be doing right things to their LLC - and topping of cake is that they are also making it to be giant on top models. And AMD is doing 3d-stacking of L3 which brings its problems to the table. Intel doesn't, they are just wasting enormous amounts of silicon space to make ultimate cpu. They aren't doing anything that should be lowering performance.

Intel's L3 has not been good compared to AMD's for a long time now, so people probably don't have much faith in them.

 

[Fjodor2001]

You aren’t factoring power into this equation.

If Intel and AMD have similar power limits, Intel will have half the effective amount of power available to each core.

Good point. But there’s also the difference in power used per core for P vs E cores.

 

[HurleyBird]

You need maybe 8c for all that

I only transcode video in the background when I'm doing light tasks. If I'm doing heavy tasks, I can feel it. On a 7900X.

 

[luro]

This really turned into an intel thread

 

[Thunder 57]

But why this forum takes it as known already? Spec-wise Intel seem to be doing right things to their LLC - and topping of cake is that they are also making it to be giant on top models. And AMD is doing 3d-stacking of L3 which brings its problems to the table. Intel doesn't, they are just wasting enormous amounts of silicon space to make ultimate cpu. They aren't doing anything that should be lowering performance.

From what I've read bLLC will be limited to one tile, not the 52C version. Also AMD has largely mitigated any frequency loss with 3D cache, and if the rumored 9850X3D is true, it will not be an issue at all anymore.

 

[Joe NYC]

Oh, I forgot to reply to this part too. We already saw how it played out with AMD. If you want the best single compute tile part, you can't buy it. AMD won't make it. It's not a big deal - maybe 3-4% slower than it could be.

But I suspect Intel will do the same. If dual tile NVL didn't exist you can guarantee that their fastest, best bin chips would appear in a single tile configuration. The mere existence of a dual tile configuration gives Intel an option to hurt every other buyer down the stack in the name of product segmentation to push that ASP.

It seems to me that Intel will hurt its own ASPs, if there is an artificial dual CCD product (that no one will buy) at the highest price, and then, the single CCD models, equivalent of 14900K will have to sell for less than $500

 

[Kryohi]

But why this forum takes it as known already? Spec-wise Intel seem to be doing right things to their LLC - and topping of cake is that they are also making it to be giant on top models. And AMD is doing 3d-stacking of L3 which brings its problems to the table. Intel doesn't, they are just wasting enormous amounts of silicon space to make ultimate cpu. They aren't doing anything that should be lowering performance.

Can't be an "ultimate CPU" if L3 latency is severely degraded by being on another chip that has to communicate to the CPU over quite some distance, instead of being placed directly over or under the CPU chiplet.

At least to my understanding, that's how the Nova bLLC would be configured.

 

[Hulk]

Let's have a little fun.

 

[Josh128]

Let's have a little fun.
View attachment 132896

Just going to totally ignore the first guess? lol

 

[LightningZ71]

People keep forgetting that the V/f curve is NOT linear. Reducing the available power per core by 1/3 doesn't drastically drop the frequency if your starting point is way over on the right where gobs of extra power barely move the frequency needle. A 12 core Zen6 processor on the same process as the 8 core Zen 5 processor at the same total power level only sheds a few hundred Mhz. If you then throw on the rather significant node bump that N2 tailored for AMD has over N4P, it likely won't shed a single Mhz. Throw in better IPC and the MT performance will be quite a bit better than many think.

 

[gdansk]

If they match the rumored competition 300W PL then there could be no per core power regression at all. If the IOd uses less power perhaps even an effective increase.

But hopefully cooler heads prevail.

 

[Hulk]

Just going to totally ignore the first guess? lol

Sorry, just missed your post.

 

[IronLynx]

Hulk, I would go with 24cores(230W), Average Freq of 5.5, and 80K of CB R23 score. Two nodes difference, plus more IPC and clocks.

 

[Markfw]

Correct, but it's just a matter of terminology, and you know what I mean.

No, its more than that. AMD cores now all have full avx-512, where P-cores do NOT. P-cores also do not have SMT and take more power compared to AMD.

Thats a lot of difference that needs to be noted in any comparison.