Question Zen 6 Speculation Thread

[maddie]

Consumers are F'ed until AI bubble bursts anyways. How many people are going to buy any PC hardware with ram prices being 10x normal?

Consumers are screwed in some fashion whether it pops or not. AI and related CAPEX is whats driving the macro economy.

 

[Joe NYC]

Feynman is late'28.
Rubin Ultra is late'27.

Really?

I wonder how much of a change Mi500 is going to be over Mi400. Will AMD get to lap NVidia?

 

[NTMBK]

Consumers are screwed in some fashion whether it pops or not. AI and related CAPEX is whats driving the macro economy.

They're driving the stock market, but they're a parasite leeching life out of the real economy. Instead of those resources being used to improve life for people, they're being poured into a bottomless money pit.

 

[adroc_thurston]

I wonder how much of a change Mi500 is going to be over Mi400

man, how do I even put it?

Will AMD get to lap NVidia?

yeah that's the thing with AMD, sooner or later they're just gonna devour you alive.

They're driving the stock market, but they're a parasite leeching life out of the real economy. Instead of those resources being used to improve life for people, they're being poured into a bottomless money pit.

Nah you see, LLMs aren't useless per se; they just don't have the business model so far to sustain all that capex.

 

[NTMBK]

Nah you see, LLMs aren't useless per se; they just don't have the business model so far to sustain all that capex.

The actual underlying computer science has some limited utility. These white elephant datacentres with thousands of rapidly aging GPUs will never, ever be worth the effort and money wasted on them.

 

[Joe NYC]

man, how do I even put it?

Oh boy:

2026 Rubin N3P
2026 Mi400 N2P
2027 Rubin Ultra N3P
2027 Mi500 N2P

Lisa reminds me of Viktor Tiknonov, the coach of Russian Army team (CSKA Moscow) and the Russian National team in 1970s-1980s. Relentless, like the Terminator.

Which is why the Miracle on Ice in 1980 (defeating Russia) was really a miracle.

 

[Joe NYC]

man, how do I even put it?

Lisa says Mi500 will be 10x of Mi400.

Not sure what changes on Zen 6 for the Mi500 rack.

More here:

https://www.bloomberg.com/news/articles/2026-01-06/amd-unveils-new-chip-for-corporate-data-centers-talks-up-demand?taid=9791da50-c490-490e-81cd-0f7763cb2934&utm_campaign=trueanthem&utm_content=bloombergtv&utm_medium=social&utm_source=twitter

https://twitter.com/x/status/2008586100437127509

 

[maddie]

They're driving the stock market, but they're a parasite leeching life out of the real economy. Instead of those resources being used to improve life for people, they're being poured into a bottomless money pit.

That was my prediction a few weeks ago. They will drain the life from profitable businesses to feed a capital destroying monster.

The actual underlying computer science has some limited utility. These white elephant datacentres with thousands of rapidly aging GPUs will never, ever be worth the effort and money wasted on them.

Reminds me of the histories of the early jet age. The tech was advancing so quickly that aircraft were seen as obsolete on entering service. I wonder what is the depreciation interval for the investments.

 

[Kepler_L2]

Interestingly Medusa Point drivers actually mention MALL:

Though could be left-over/copy pasted code from older drivers as it happens sometimes.

 

[branch_suggestion]

CES 2026: Taking the Lids off AMD's Venice and MI400 SoCs

Here at CES 2026, AMD showed off their upcoming Venice series of server CPUs and their upcoming MI400 series of datacenter accelerators.

chipsandcheese.com

 

[adroc_thurston]

CES 2026: Taking the Lids off AMD's Venice and MI400 SoCs

Here at CES 2026, AMD showed off their upcoming Venice series of server CPUs and their upcoming MI400 series of datacenter accelerators.

chipsandcheese.com

i love trench cap rows and I certainly love sniffing speed

 

[dr1337]

The actual underlying computer science has some limited utility. These white elephant datacentres with thousands of rapidly aging GPUs will never, ever be worth the effort and money wasted on them.

Worth the effort? highly debatable, its the same effort that goes into consumer products if not less.

Assuming the industry doesn't completely crater, all the old(current) stuff should wind up on the used markets in 5 or so years. And then we can all run AI at home instead of on the cloud.

That was my prediction a few weeks ago. They will drain the life from profitable businesses to feed a capital destroying monster.

This is the main concern, I work in integration and commercial solutions are drying up real fast. Its definitely a push by SaaS providers to cut off the rest of the industry.

They don't want independent AIs or local systems. OpenAI is pretty evil about it too, they always release a larger and less censored model initially, and then cull it back after a few weeks once they know the weaknesses and trick consumers into thinking they're getting one product, but instead its another.

Can't rug-pull people if we all have the models downloaded locally.

I do wonder about the circular economics. The AI companies buying hardware at higher than normal margins combined with the hardware companies buying shares in the AI companies just seems like a ponzi scheme. If the banks ever stop giving the AI companies seed money, the whole thing is just a tower of cards. (another reason why they want to prevent local AI, to force control of consumers money)

 

[Joe NYC]

CES 2026: Taking the Lids off AMD's Venice and MI400 SoCs

Here at CES 2026, AMD showed off their upcoming Venice series of server CPUs and their upcoming MI400 series of datacenter accelerators.

chipsandcheese.com

Good catch by C&C: Venice-X lives.

BTW, that was my prediction, that AMD would bring back V-Cache to server, even if Turin-X was skipped.

But I think more likely, this is going to be using the same CCD (with V-Cache) as desktop, using full Zen 6 cores, rather than dense cores.

So then, Venice-X would have (12 * 4 MB L3 + 12 * 8 MB V-Cache) * 8 chiplets =
(48 MB + 96 MB) * 8 chiplets = 144 MB * 8 chiplets = 1,152 MB

 

[Tarkin77]

Lisa says Mi500 will be 10x of Mi400.

is it 10x?

i really don't know how to interpret this:

AMD shared additional details at CES on the next-generation AMD Instinct MI500 GPUs, planned to launch in 2027. The MI500 Series is on track to deliver up to a 1,000x increase in AI performance compared to the AMD Instinct MI300X GPUs introduced in 20231

AMD and its Partners Share their Vision for “AI Everywhere, for Everyone” at CES 2026

News Highlights AMD provided an early look at its “Helios” rack-scale platform, the blueprint for yotta-scale AI infrastructure, built on AMD…...

ir.amd.com

"Based on engineering projections by AMD Performance Labs in December 2025, to estimate the peak theoretical precision performance of AMD Instinct™ MI500 Series GPU powered AI Rack vs. an AMD Instinct MI300X platform. Results subject to change when products are released in market."

is 1000x Helios vs single "platform" of 8 mi300x??? Is 10x vs. mi400 single gpu or "helios" rack vs mi500 "titan" rack (with 3.5x number of gpus)

????

 

[Joe NYC]

is it 10x?

i really don't know how to interpret this:

AMD shared additional details at CES on the next-generation AMD Instinct MI500 GPUs, planned to launch in 2027. The MI500 Series is on track to deliver up to a 1,000x increase in AI performance compared to the AMD Instinct MI300X GPUs introduced in 20231

AMD and its Partners Share their Vision for “AI Everywhere, for Everyone” at CES 2026

News Highlights AMD provided an early look at its “Helios” rack-scale platform, the blueprint for yotta-scale AI infrastructure, built on AMD…...

ir.amd.com

"Based on engineering projections by AMD Performance Labs in December 2025, to estimate the peak theoretical precision performance of AMD Instinct™ MI500 Series GPU powered AI Rack vs. an AMD Instinct MI300X platform. Results subject to change when products are released in market."

is 1000x Helios vs single "platform" of 8 mi300x??? Is 10x vs. mi400 single gpu or "helios" rack vs mi500 "titan" rack (with 3.5x number of gpus)

????

Maybe, using some measure, AMD concluded that:

Mi355 = 10x Mi300
Mi400 = 10x Mi355
Mi500 = 10x Mi400

 

[NTMBK]

Worth the effort? highly debatable, its the same effort that goes into consumer products if not less.

Consumer products don't require hundreds of billions of dollars of construction costs, reactivated coal power plants, etc

 

[basix]

Maybe, using some measure, AMD concluded that:

Mi355 = 10x Mi300
Mi400 = 10x Mi355
Mi500 = 10x Mi400

I think it is rather simple: 8x GPU MI300X cluster vs. Full MI500 rack
MI300X delivers 1.3 PFLOPS of FP16 (matrix calculations). A MI300X platform is a 8x GPU cluster, so this results in 10.4 PFLOPS.

MI455X will bring FP4 support and at Helios rack level this results in 3 ExaFLOPS. Now double the amount of GPUs per rack for MI500, make the GPUs itself 1.75x faster (plausible if e.g. increasing GPU size by using 3x or 4x base Die tiles instead of 2x) and we land at 10.5 ExaFLOPS per rack.

10.5 ExaFLOPS / 10.4 PFLOPS = 1000x 😉

 

[Joe NYC]

Any guesses about the Venice-X?
1) 12-core CCD + V-Cache
2) 32-core CCD + V-Cache
3) something entirely different, such as Zen 6 cores on Mi430 GPU, with base die area under the cores serving as V-Cache

 

[Tangopiper]

Any guesses about the Venice-X?
1) 12-core CCD + V-Cache
2) 32-core CCD + V-Cache
3) something entirely different, such as Zen 6 cores on Mi430 GPU, with base die area under the cores serving as V-Cache

View attachment 136394

Likely 1. I don’t think the 32 core CCD has 3D TSVs.

3 would be fun, but given MI300A never got a successor it is doubtful

 

[Win2012R2]

I don’t think the 32 core CCD has 3D TSVs.

As much as I like the idea you are most likely right, from what I could see AMD sold a lot of Milan-X to companies that got high per core licensing costs and 3D cache was big speed up for the software that was used (like EDA), so those favour fast clocked cores + lots of cache, where as max core SKUs are for hyperscalers that run independent workloads on them.

 

[Win2012R2]

Ok, it's 2026 - when should we expect to see first perf leaks?

If intro is in 6 months, then perhaps Mar-Apr for 60%+ videos from MLID?

 

[adroc_thurston]

Ok, it's 2026 - when should we expect to see first perf leaks?

AMD already gave you the ballpark Venice socket scores.

 

[Win2012R2]

AMD already gave you the ballpark Venice socket scores.

That's too generic, what I'd like to know single thread perf, clock rates (especially all cores) - plus of course Zen6X3D stuff, they'd better release it from start without delay.

 

[adroc_thurston]

clock rates (especially all cores).

Those you can model off Venice perf numbers.
They're SIR2017 n-copy so remember the scaling rate.

 

[Win2012R2]

Those you can model off Venice perf numbers.

I don't think I'll be able to afford those server chips, not with memory prices as they are, so this time thinking about personal Zen6 upgrade.

Once IPC will be known for Venice chips I doubt they'll be able to hide much longer.