Question Zen 6 Speculation Thread

[Darkmont]

And to hell with it, NVL loses to Glymur let alone Z6, Intel is a banana republic.

Total Nuvia supremacy

 

[Joe NYC]

Yes, but A16 may not offer enough of a benefit over N2 to justify an entire family design change. Moving forward, it may require a double die shrink to make it worthwhile to move to a new process, and thus a new generation of processors.

This will be for Zen 7, not Zen 6. So, it is a new CPU generation on a new generation process technology. I don't see a problem with this.

Processors are only redesigned when transistor budget increases provide a path to meaningful improvements to the product. When a single die shrink offered double the transistor budget, this was a no brainer. When a single die shrink offers 10-15% higher transistor density ..... and costs 30-50% more? Not so much.

I feel many people here overlook (or don't agree) that this is true and that from one generation to another, just using the same transistor budget, but doing it more cleverly, will give you very meaningful gains. I just don't believe this is true. I think it requires more transistors to give meaningful gains in processing.

It's incremental. Incremental improvement to CPU / GPU designs, incremental improvement to process technologies.

It seems that (coincidently?) the cadence may be converging, between CPU generations and new process technology nodes.

 

[Joe NYC]

What matters is the ASP of the main margin additive part.
For Z4 it was $450, Z5 $480 and Z6 it's gonna be $600.

Yup, Change in ASP in dollar terms dwarfs the change in BOM in dollar terms.

There is another scenario where ASPs don't have to change very much, that can still absorb the increased BOM. Consider this scenario:
- AMD moves to more advanced node, which increases BOM
- as a result of advanced node, AMD sells more CPUs, because they are more attractive
- as a result of selling more CPUs, design costs are spread over larger number of CPUs
- resulting in design cost per CPU going down
- lower design cost per CPU can offset increased BOM

 

[Joe NYC]

Total Nuvia supremacy

I would discount for:
- the rigged Geekbench 6
- long hype cycle before products ship

 

[OneEng2]

What matters is the ASP of the main margin additive part.
For Z4 it was $450, Z5 $480 and Z6 it's gonna be $600.
That more than overcomes the BOM increase, N2P is the right call and volumes will be similar in time, which means more revenue and more GM than prior generations.
This is exactly what NV has done for each generation since Maxwell with a short break for Ampere (node was dirt cheap so GMs were still very good), it works when you win and can only be stopped when you lose.

And to hell with it, NVL loses to Glymur let alone Z6, Intel is a banana republic.

Currently AMD is winning the high end of nearly every market in x86 and thus is raking in all the gravy.

As long as AMD maintains a performance advantage (and power advantage in some cases), they will maintain this market.

Holding the market position doesn't determine the price of a position within that market. The top end of the desktop market is still $500-$700. It doesn't matter that Zen 6 may be 25% faster than Zen 5. It doesn't become 25% more expensive. This is NOT how the market works.

Should AMD dominate sales in the higher margin areas, they will still wish to expand into the lower margin, higher volume markets. In these markets, cost plays a huge role. This is where N3P would make more sense than N2.

It's incremental. Incremental improvement to CPU / GPU designs, incremental improvement to process technologies.

It seems that (coincidently?) the cadence may be converging, between CPU generations and new process technology nodes.

I wonder if "the juice is worth the squeeze" though. Why go through an entire development cycle, pay for higher production costs for a product that gains you ~10% over the previous product?

Can you even justify the NRE for that?

I also think that the answer to that question largely depends on your position in the competitive market. If AMD can dominate with a less expensive node (like they are today), how would it make any sense to use a more expensive node?

Am I the only person here old enough to remember the stagnation we had with Intel when AMD was not competitive?

I have been an AMD fan for decades. Still, I am no fool. Should AMD become dominant, and Intel offers no reasonable competition, the top end will stagnate. Sure, AMD will punish Intel (just as Intel punished AMD in the past) by pricing their lower end products to squeeze Intel out of profit where they CAN compete and rake in the profit where they can't.

Yup, Change in ASP in dollar terms dwarfs the change in BOM in dollar terms.

There is another scenario where ASPs don't have to change very much, that can still absorb the increased BOM. Consider this scenario:
- AMD moves to more advanced node, which increases BOM
- as a result of advanced node, AMD sells more CPUs, because they are more attractive
- as a result of selling more CPUs, design costs are spread over larger number of CPUs
- resulting in design cost per CPU going down
- lower design cost per CPU can offset increased BOM

What if AMD can do that (as it is today) AND not use the leading and most expensive node to do it?

Once a company achieves domination in a market, they usually slow WAY down .... and even sandbag. They hold up new advances just waiting on when the competition makes them play a new card.

 

[Joe NYC]

Currently AMD is winning the high end of nearly every market in x86 and thus is raking in all the gravy.

Not on the client. Still in 20% range market share in both desktop and clients. There is a plenty of room to double that.

I still see a ton of Arrow Lake 285 on Dell site. So AMD does not have enough of high end even in desktop.

In notebooks, AMD has minimum high end penetration. Servers is the only area where AMD dominates the high end.

As long as AMD maintains a performance advantage (and power advantage in some cases), they will maintain this market.

The goal is to increase the gap, not just maintain it, which would then enable faster shift in market shares.

In theory, AMD share can go up 4x, and at the end, the state of x86 would be the same, except the players would flip their 80:20 to 20:80

Holding the market position doesn't determine the price of a position within that market. The top end of the desktop market is still $500-$700. It doesn't matter that Zen 6 may be 25% faster than Zen 5. It doesn't become 25% more expensive. This is NOT how the market works.

On this, I agree. But the way to get to higher ASPs is not just by increasing the price of your highest end product.

You get there by displacing Arrow Lake 285 and Raptor Lake 14900K. Shrinking Intel's participation in high end to minimum and taking over majority of this market. IOW, just selling more of the high end SKUs, which will lift the ASPs

Should AMD dominate sales in the higher margin areas, they will still wish to expand into the lower margin, higher volume markets. In these markets, cost plays a huge role. This is where N3P would make more sense than N2.

True. And AMD may use the MDS1 die for low end desktop in AM5. Monolithic design could be cost competitive with 2 chip desktop CPUs, such as 9600X, 9700X. And continue to offer 9800x3d with reduced price (but still good margins).

I wonder if "the juice is worth the squeeze" though. Why go through an entire development cycle, pay for higher production costs for a product that gains you ~10% over the previous product?

I think the mistake you are making is overestimating AMD penetration in client. DIY is not representative of the whole client. There is room, in client, for massive market share gains.

I also think that the answer to that question largely depends on your position in the competitive market. If AMD can dominate with a less expensive node (like they are today), how would it make any sense to use a more expensive node?

To go from 20% to 40% to 60% to 80%.

Lack of success penetrating in notebook space and limited success in commercial client does not equal to lack of ambition.

It just means the stars were not aligned yet to allow this to happen

Am I the only person here old enough to remember the stagnation we had with Intel when AMD was not competitive?

I have been an AMD fan for decades. Still, I am no fool. Should AMD become dominant, and Intel offers no reasonable competition, the top end will stagnate.

I am quite willing to go ahead with this experiment, to see the market shares flip from 80:20 to 20:80 and then see how AMD would innovate from there.

Any stagnation would invite more competition from Arm side of things (Apple, Qualcomm, Nvidia, MediaTek)

Including Apple, the market share is like:
- Intel 70%
- AMD 20%
- Apple 10%

 

[OneEng2]

Not on the client. Still in 20% range market share in both desktop and clients. There is a plenty of room to double that.

I still see a ton of Arrow Lake 285 on Dell site. So AMD does not have enough of high end even in desktop.

In notebooks, AMD has minimum high end penetration. Servers is the only area where AMD dominates the high end.

I think for OEM sales, Intel has a huge history of package deals and just general know-how in that market that AMD is just starting to learn. On the other hand, DIY has been AMD's bread and butter for decades.

I am not certain that AMD's success and experience in DC translates well into consumer OEM. I feel they still have lots to learn for this market and it is this learning that holds them back, not the product lineup.

The goal is to increase the gap, not just maintain it, which would then enable faster shift in market shares.

In theory, AMD share can go up 4x, and at the end, the state of x86 would be the same, except the players would flip their 80:20 to 20:80

No argument. I think that supplying the larger market, lower margin products to OEM's requires a certain combination of product mix, OEM interaction processes, and volumes of scale AMD is not currently adept at.

I think the mistake you are making is overestimating AMD penetration in client. DIY is not representative of the whole client. There is room, in client, for massive market share gains.

Agree.

Lack of success penetrating in notebook space and limited success in commercial client does not equal to lack of ambition.

It just means the stars were not aligned yet to allow this to happen

I think for decades, the deck was stacked in Intel's favor in commercial client. The old guard dies hard.

 

[Joe NYC]

I think for OEM sales, Intel has a huge history of package deals and just general know-how in that market that AMD is just starting to learn. On the other hand, DIY has been AMD's bread and butter for decades.

I am not certain that AMD's success and experience in DC translates well into consumer OEM. I feel they still have lots to learn for this market and it is this learning that holds them back, not the product lineup.

No argument. I think that supplying the larger market, lower margin products to OEM's requires a certain combination of product mix, OEM interaction processes, and volumes of scale AMD is not currently adept at.

Agree.

I think for decades, the deck was stacked in Intel's favor in commercial client. The old guard dies hard.

The lead AMD had in server, from Rome to Milan, was massive. 2 to 1 even 4 to 1 replacement ratio of installed or currently offered Intel parts.

Now, in DIY, the lead in gaming is also massive, and it has turned the needle, 14900K and 285K Intel parts are finding it hard to maintain any market share for Intel.

So, AMD is going to use all its tools in the toolchest to create the same situation in client notebook market. You can see, from the leaks, that this storm is coming in H1 2027, with chiplet Zen 6 and RDNA5 parts. And an early preview, with N3P Zen 6 based Medusa MDS1 die in 2026.

 

[adroc_thurston]

with chiplet Zen 6 and RDNA5 parts

Those are expensive specialty parts.
Actual Zen6 lineup is all RDNA3.5.

 

[Joe NYC]

Those are expensive specialty parts.
Actual Zen6 lineup is all RDNA3.5.

Even though AMD does not do real "refreshes" much, there would be a good reason to refresh MDS1 die from RDNA3.5 + NPU -> RDNA5

 

[Joe NYC]

I wonder what (if any answer) AMD has for Intel AMX. I wonder if or when we could see AMX and APX in Zen CPUs. Probably not Zen 6

The Massive AI Performance Benefit With AMX On Intel Xeon 6 "Granite Rapids"​

The Massive AI Performance Benefit With AMX On Intel Xeon 6 "Granite Rapids" - Phoronix

www.phoronix.com

 

[Joe NYC]

Sample of benchmarks:

 

[adroc_thurston]

there would be a good reason to refresh MDS1 die from RDNA3.5 + NPU -> RDNA5

Nope you go straight to Zen7 APUs.

I wonder what (if any answer) AMD has for Intel AMX

Yeah it's called MI400.

 

[Joe NYC]

Nope you go straight to Zen7 APUs.

If the cadence is now 24 months+ (with Zen 6) and then, projecting the same to Zen 7, there is more than enough time for a refresh that is this meaningful.

RDNA3.5 + NPU -> RDNA5

would mean more GPU power, higher TOPS score out of the same or smaller die.

Yeah it's called MI400.

And leave the CPU inference type workloads all to Intel?

Is there any estimate how much it costs, in die area, to implement AMX? Intel does not seem to be hurting too much having it in Granite Rapids CPU.

 

[gdansk]

I wonder what (if any answer) AMD has for Intel AMX. I wonder if or when we could see AMX and APX in Zen CPUs. Probably not Zen 6

Looking at this I do not see the need or any reason to include the AMX units in the "IA" host.
If AMD wants AMX from Intel, they'll probably do it with some weird glue. If they include enough, it'll put the Zen team in some competition with MI. Maybe they'll do it anyway.

 

[turtile]

If the cadence is now 24 months+ (with Zen 6) and then, projecting the same to Zen 7, there is more than enough time for a refresh that is this meaningful.

AMD already announced that Zen 7 will be released in 2027 with the MI500 series.

 

[Joe NYC]

AMD already announced that Zen 7 will be released in 2027 with the MI500 series.

In that case, it would make sense to wait for new Zen 7 APU, to include RDNA5 with. But then the question is: Why is Zen 6 late? Why is MDS1 not released in H1 2026?

 

[Joe NYC]

View attachment 131022
Looking at this I do not see the need or any reason to include the AMX units in the "IA" host.
If AMD wants AMX from Intel, they'll probably do it with some weird glue.

I wonder if there is any way to remap it to the units that execute AVX-512

If they include enough, it'll put the Zen team in some competition with MI. Maybe they'll do it anyway.

I think the gap between regular Zen and Mi400 is too big to leave everything in between to Intel.

There was an idea to include AI compute units with Turin that was killed. So I am not sure what, if anything AMD plans for it.

As far as I know, AMD never explained its opinion of AMX, or what AMD sales people tell clients in sales presentations.

 

[gdansk]

If the cadence is now 24 months+ (with Zen 6)

Zen 6 architecturally is not a big step forward (relative to anyone except Intel P core). Each and every part depends on physical design and implementation to achieve competitive frequency in its target market. If it ships after July 2026, they really need to re-Zen themselves.

But in theory Zen 6 slipping even beyond 24 months shouldn't impact its follow up. AMD is still using two teams, right?

 

[OneEng2]

As far as I know, AMD never explained its opinion of AMX, or what AMD sales people tell clients in sales presentations.

Based on a little reading and research, AMX is only interesting in a few use cases. It is severely outclassed (by many orders of magnitude) by accelerator cards from AMD and NVidia.

I am not sure where that leaves AMX.

Do you have a specific use case where it will benefit DC applications (Not LLM which will be performed on accelerators for sure).

 

[OneEng2]

Zen 6 architecturally is not a big step forward (relative to anyone except Intel P core). Each and every part depends on physical design and implementation to achieve competitive frequency in its target market. If it ships after July 2026, they really need to re-Zen themselves.

But in theory Zen 6 being slipping even beyond 24 months shouldn't impact its follow up. AMD is still using two teams, right?

Agree.

I believe that the biggest gains will be due to clock speed (desktop) and cores (DC), and memory bandwidth increases on both due to the new IOD's.

The clock speed and core count increases are pretty much due to the move from N4P to N2. The new IOD and memory support might result in lower latency, and certainly higher bandwidth with the higher clocked memory support.

 

[Joe NYC]

Zen 6 architecturally is not a big step forward (relative to anyone except Intel P core). Each and every part depends on physical design and implementation to achieve competitive frequency in its target market. If it ships after July 2026, they really need to re-Zen themselves.

When I pointed elsewhere on gating factors for certain SKUs, such as N2P/N2X for the 12 core CCD, the MDS1 die does not have anything holding it back other than AMD itself. N3P is (presumably) perfectly fine node, RDNA3.5 has already been used in other CPUs, NPU may just be an iterative upgrade.

Zen 6 core doesn't seem like a super ambitious generation. Just some optimization of the cores themselves and optimizing the physical design - something AMD is good at.

As far as chiplet interfaces, that has also already been done with Strix Halo, so not breaking new ground.

Which is why I also don't get why it would ship past Mid 2026.

As far as shifting resources, if server chips need node that goes into HWM later in 2026, then why not put those resources on task of getting Zen 6 mobile released sooner. It also happens in the most important CPU market for AMD to try to penetrate.

But in theory Zen 6 slipping even beyond 24 months shouldn't impact its follow up. AMD is still using two teams, right?

If AMD is going with pair-dies approach in high end server CPUs, it is possible that similar approach will be taken in other segments. The pair die approach to something like MDS1 successor just might put so much distance between AMD and Intel that Intel is uncompetitive.

For example, N2P compute die, and N6/N4 base die for SRAM and analog. It seems like a logical next step following increase used of chiplets in Zen 6.

Chiplets is what cracked the server market, now the DIY market, and it may take chiplets (or pair dies in this case) to crack the mainstream notebook market.

If AMD takes this approach, then client CPUs may take some extra time, but server CPUs could still be released quite early, as the 2027 year suggests.

 

[adroc_thurston]

there is more than enough time for a refresh that is this meaningful.

You're super eager to torture poor-poor SOC people.

For example, N2P compute die, and N6/N4 base die for SRAM and analog

forget about SoIC anywhere but extra premium client.

RDNA3.5 + NPU -> RDNA5

would mean more GPU power, higher TOPS score out of the same or smaller die.

just forget about it.

And leave the CPU inference type workloads all to Intel?

Well yeah, that's very very low margin stuff for people who can't ship good accelerators.

 

[gdansk]

I wonder if there is any way to remap it to the units that execute AVX-512

The library or runtime you're using supports that too. So that's the mapping, it's already done. It was actually done first. Lisa even forced Intel to pay for it.

 

[Cheesecake16]

As far as I know, AMD never explained its opinion of AMX, or what AMD sales people tell clients in sales presentations.

AMD's opinion on AMX is very clear, just buy GPUs... They even had a TCO chart to that effect...

Zen 6 core doesn't seem like a super ambitious generation. Just some optimization of the cores themselves and optimizing the physical design - something AMD is good at.

We know functionally very little about the Zen 6 core other than it will support VP2INTERSECT, that Zen 6 is likely Family 1Ah, and that the performance increase from the 9965 to the top of SKU Venice CPU is ~1.7x...