Question Zen 6 Speculation Thread

[igor_kavinski]

Their primary design target is perf/area to maximise core counts (like Zen #c), not absolute perf like *cove.

But the Zen #c architecture didn't give up SMT, did it now?

Explain that away

Spoiler: RANT

I REALLY hate that AMD isn't giving us 64 Zen 4c or Zen 5c cores on desktop!
Don't talk about "market for such a CPU doesn't exist". The product needs to exist first to allow users to testdrive it for their common workloads and then addicted to using it.

 

[CouncilorIrissa]

But the Zen #c architecture didn't give up SMT, did it now?

Explain that away

Spoiler: RANT

I REALLY hate that AMD isn't giving us 64 Zen 4c or Zen 5c cores on desktop!

Because it's just a different physdes, the core still has plenty of execution resources, unlike -monts that are designed to ppa-maxx from the ground up.
As far as AMD's concerned, removing SMT is just more work for no benefit.

 

[Thunder 57]

I was talking about perf/watt when you limit the power consumption, so it does not run at stock TDP.

Check the TDP scaling graph I linked to before.

Like I said earlier that is a a best case for ARL. And of course lowering voltage/clocks increases efficiency. Short of being on Captain Planet's fan club what does it matter? How many people are buying 285k's and limiting them to 125/150W? Meanwhile in the Handbrake test the 9950X is slightly faster at far less power. So, anyone can cherry pick a benchmark.

They won't make an 8 core for a while so it will be pay up for the 12c or go without.

We don't know that. Last time they launched the high end first. This time it was the "low" end first. I am inclined to agree though. AMD doesn't want to sell 12 core CCD's at 8 core prices.

 

[igor_kavinski]

As far as AMD's concerned, removing SMT is just more work for no benefit.

Why not disable it and save the extra silicon validation time?

Answer: Because their SMT is actually better than Intel's excuse of hyperthreading, so much that they disabled it in Arrow Lake because they were afraid of the ST performance going even further down.

Intel really didn't need to rush Arrow Lake. Imagine if they had worked just a bit harder to enable HT (even their half assed attempt), we could've had the first x86 consumer CPU with 48 threads in 2025!

 

[adroc_thurston]

Why not disable it and save the extra silicon validation time?

They've already validated SMT for classic.

we could've had the first x86 consumer CPU with 48 threads in 2025!

I have a bridge to sell to you If you think this is a relevant metric anyone cares about.

 

[Timorous]

We don't know that. Last time they launched the high end first. This time it was the "low" end first. I am inclined to agree though. AMD doesn't want to sell 12 core CCD's at 8 core prices.

Any 8c/9c/10c dies that get made will be for server and the cut down dual CCD X3D part. For single CCD X3D it will just be 12c to begin with. Maybe a cut down single CCD part will release 9 months later but why would AMD undercut themselves from the off when they have no competition for the top end gaming part.

 

[Thunder 57]

Any 8c/9c/10c dies that get made will be for server and the cut down dual CCD X3D part. For single CCD X3D it will just be 12c to begin with. Maybe a cut down single CCD part will release 9 months later but why would AMD undercut themselves from the off when they have no competition for the top end gaming part.

Isn't that pretty much what I said, that they won't want to sell cut down CCD's at first? I just said we can't know just yet.They may launch 12/10C X3D's then 8 core further down the line.

 

[Timorous]

Isn't that pretty much what I said, that they won't want to sell cut down CCD's at first? I just said we can't know just yet.They may launch 12/10C X3D's then 8 core further down the line.

All the cut single CCD X3D parts have come a long time after the primary products and some have been limited run exclusives.

Edit. I just checked and the 5600 and 7600 were both micro centre exclusive. No idea about the 9600 as that was only leaked with the R9700 support list and has not officially been announced.

 

[igor_kavinski]

I have a bridge to sell to you If you think this is a relevant metric anyone cares about.

Sell me a Zen 6 ES with compatible mobo and we are good

 

[Fjodor2001]

Like I said earlier that is a a best case for ARL. And of course lowering voltage/clocks increases efficiency. Short of being on Captain Planet's fan club what does it matter? How many people are buying 285k's and limiting them to 125/150W?

The point is this which I mentioned earlier:

"ARL-S: 125W TDP and 8P+16E.
NVL-S: 150W TDP and 16P+32E.

So much lower TDP per core for NVL-S when all cores are used."

I.e. we can guesstimate how NVL-S will perform w.r.t. perf/watt in MT workloads by looking at how ARL-S performs when limiting the TDP. Because on NVL-S you'll only have roughly 60% of the TDP per core compared to what ARL-S has, when both are running at their stock TDP.

 

[Fjodor2001]

On average 9W for the 285K vs over 40W for Zen 5 (9950X).

Very different numbers were shown in different graphs, so how do we know which is correct? E.g. 285K ranged from 9-24 W, and 7900X/9950X (which both use same IOD) ranged from 23.8-48W.

I would not expect the numbers to vary this much if they are supposed to only measure the IOD power consumption at idle. It's not likely that a "good" Zen6 IOD chip unit consumes 23.8W and a "bad" 48W. So simply taking the average of the numbers does not seem like a good solution.

Also, do you have links to the sources (which may contain some clues to why the numbers differ so much)?

 

[Joe NYC]

I also think AMD will have to play stupid segmentation games if they want people to buy more than a 1 x 12 core part.

That's a good point. If you always look at how much the 1 additional core adds to performance, although declining, with each additional core, it is positive and predictable pattern.
Say 4->5->6->7->8

But with 8 core chiplets, the 9th core may be negative, and the gains are much smaller between 8->12.

Extending predictable (positive) progression to 12 cores and then a lot of turbulence > 12 cores means that 2 chiplet Zen 6 will be a much harder sell, just because the 1 chiplet, 12 core CPUs will be so good.

 

[Joe NYC]

All the N2P stuff should be over 6GHz, dunno about N3P versions of Zen6.

In other words, the premium, chiplet based mobile CPUs should be over 6 GHz, while monolithic mobile CPUs will likely be below 6 GHz

 

[Joe NYC]

You can tell if it's for desktop…
Isn't it difficult to get 6GHz on a laptop no matter what?

A single core, boost frequency? Possible.

 

[Joe NYC]

Probably too expensive. I'd think an 8 core X3D would sell better.

AMD may not even introduce such a chip right at the outset. Maybe after a delay, like the 5500x3d/5600x3d, 7600x3d (limited retailers), 9600x3d (rumored).

 

[Joe NYC]

If anything Intel should likely have the advantage of supporting faster DDR5 speeds

Starting from Zen 6, AMD will have brand new IO Dies. There is no reason to assume one company to have better implementation (faster speeds) than the other company. They will most likely be on par.

 

[StefanR5R]

(more cores for better interactivity?)

Ummm...do greater number of threads not exist? More cores to handle OS/background threads means less time wasted in context switching. Overall system responsiveness is improved.

Let's say you have two cores in your system. One is busy for 3 % of its time, the other is entirely idle. When one of the (background or foreground) tasks become runnable, does it matter if the OS schedules it on CPU 0 or on CPU 1? Nope, either of the two CPUs would have to go through the motions which a context switch involves (loading stuff into caches and TLBs, et cetera pp.). If anything, it is worthwhile to keep it all on one CPU (as long as it is not much utilized) and leave the other CPU idle and thus in a low power state.

One thing that is not measured/benchmarked very well is real user workloads where they may have multiple applications open at the same time and switching between them frequently.

Context switches take awfully long if you look at them in terms of CPU cycles. Yet they happen magnitudes faster than humanly perceivable response times.

The upshot is: More cores are good for throughput (to a degree which depends on your algorithms and data), not for responsiveness.

What you need for responsiveness is a) preemptive multitasking (Microsoft has it since Windows NT), b) some smarts and precautions for those remaining parts of the system which are not preempted (some interrupt handlers, or AFAIK in most of the popular OSs: parts of all of the interrupt handlers), c) not overdoing it with highlevel software bloat like visual effects in the UI which introduce a perceived sluggishness artificially, d) responsive mass storage, responsive networking peers...

 

[MS_AT]

The upshot is: More cores are good for throughput (to a degree which depends on your algorithms and data), not for responsiveness.

Well, depends. If you have a thing you care about and a bunch of stuff that has to be done but is not so critical, if you dedicate one core to your precious task and the "background" to remaining cores you will increase its responsivness compared to the situation you had one core that had to handle both your precious task and eveything else.

 

[inquiss]

Probably too expensive. I'd think an 8 core X3D would sell better.

I doubt you'll be seeing that for a while. Why would AMD sell an 8c chip when they can offer a 12 core chip for more. Want the 8 core? Get zen5..

 

[LightningZ71]

I get the feeling that they'll be selling them in 12, 16, 20, and 24 core varieties for quite a premium for a while.

 

[Thunder 57]

I doubt you'll be seeing that for a while. Why would AMD sell an 8c chip when they can offer a 12 core chip for more. Want the 8 core? Get zen5..

I agree with that but in context I was saying I think the 12 core X3D won't be the best seller because of cost. I think people may settle for non-X3D versions instead, or just wait for cheaper X3D variants to appear. I could very well be wrong. Today's gamer is typically not a patient person.

 

[LightningZ71]

There are going to be some games that see a massive performance increase between the 9700x and the 12 core CCD part due to the combination of higher core throughout and a 50% larger L3. Anything that has a primary working set between 30MB and 44MB and anything that needs more than 8 threads.

There are also situations where the regular 12 core part will substantially beat the 8 core X3D parts for similar reasons as there are a couple of cycles of extra latency for the X3D L3.

 

[Io Magnesso]

There are going to be some games that see a massive performance increase between the 9700x and the 12 core CCD part due to the combination of higher core throughout and a 50% larger L3. Anything that has a primary working set between 30MB and 44MB and anything that needs more than 8 threads.

There are also situations where the regular 12 core part will substantially beat the 8 core X3D parts for similar reasons as there are a couple of cycles of extra latency for the X3D L3.

Certainly, the normal model didn't even consider the increase in cache.
The Zen6 X3D will be more powerful, but the regular Zen6 model is also strong because it increases the cache.
That's enough

 

[igor_kavinski]

The upshot is: More cores are good for throughput (to a degree which depends on your algorithms and data), not for responsiveness.

I would have to disagree based on turning off HT on a Core i5-10105. Idea was that without HT, the CPU would get less hot, it would be able to boost higher and responsiveness would improve. But the opposite happened. Win11 took much longer to load. Those measly four cores got overloaded quickly to a point where the OS was spending more time interrupting processes and juggling threads, all in an attempt to be "fair" to all the processes.

I noticed the same thing on my laptop with i3-1125G4 4C/8T CPU. Became almost unusable without HT. That max 30% performance boost made possible by HT doesn't explain the sudden loss of responsiveness. More cores help threads to be distributed all around without resource contention even if they are just virtual fake cores.

The responsiveness issue was less pronounced with turning HT off on a Core i5-12500 but it was still fairly noticeable. You "miss" the extra thread devouring virtual cores. I don't understand how some gamers are able to live with just eight P-cores with HT off on their modern Intel CPUs in their quest to get the best ST performance possible. The most likely explanation is that they deceive themselves into thinking that their game feels much smoother with HT turned off.

 

[DrMrLordX]

Will desktop Zen 6's IO die be reworked or it will continue to gulp 20-40W doing nothing?

It could be reworked and still gulp 20W+ doing nothing.

SMT4!!!

Sometimes I wish we lived in an alternate timestream where IBM made consumer-level 1c/8t products with SMT8.

@Fjodor2001

I've heard TDPs of 350-400W quoted for the 48c/48t part. Could just be rumours and nonsense. Regardless you'll get better MT performance out of the already-been-out-for-a-year+ Threadripper, plus more memory bandwidth, better I/O, basically the whole nine yards.