Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[NostaSeronx]

Which is why I am wondering about the wisdom of Lion Cove and Skymont dropping it.

AMD hasn't OoOE'd the SMT away. 8-wide decode/maximum instruction rate on Zen5 is only really feasible with SMT-enabled.

Intel has too much OoOE optimization to make SMT have a worthwhile massive uplift.

 

[OneEng2]

AMD hasn't OoOE'd the SMT away. 8-wide decode on Zen5 is only really feasible with SMT-enabled.

Intel has too much OoOE optimization to make SMT have a worthwhile massive uplift.

True that. It seems like they have Zen 5 balanced pretty well with respect to decode, execution, and retire paths. It wouldn't be able to feed all those execution units in parallel without the wide decode front end.

 

[OneEng2]

Intel never got more than 10% for some reason. Their design must be garbage.

Ya know, I really don't quite understand this, but you are right (although I generally hear 10-15%). Intel was first to the desktop with SMT. Before P4, SMT was only used in high end server/workstation chip designs. Strange that they haven't managed to get better at it in all these years.

Also interesting is the spin from the 2 companies. When AMD had only SMP, their marketing spin was "we believe in having FULL cores". Now I hear the same type of discussion from Intel. It didn't go so well for AMD. Hope Intel has better luck with the idea.

 

[Saylick]

True that. It seems like they have Zen 5 balanced pretty well with respect to decode, execution, and retire paths. It wouldn't be able to feed all those execution units in parallel without the wide decode front end.

I'm really, really hoping AMD improves Zen 6 such that both sets of decoders can work on the same thread in SMT-off mode. Then for those who want maximum MT throughput, they can leave SMT on. For those who want a stronk core, they can turn SMT off.

 

[HurleyBird]

I'm really, really hoping AMD improves Zen 6 such that both sets of decoders can work on the same thread in SMT-off mode. Then for those who want maximum MT throughput, they can leave SMT on. For those who want a stronk core, they can turn SMT off.

Given that Mike Clark himself was confused for a bit over whether both sets of decoders could be utilized without SMT, my guess is that it's just bugged in Zen 5.

 

[Saylick]

Given that Mike Clark himself was confused for a bit over whether both sets of decoders could be utilized without SMT, my guess is that it's just bugged in Zen 5.

If it’s a bug, I hope it can be addressed via some sort of microcode update.

 

[adroc_thurston]

If it’s a bug, I hope it can be addressed via some sort of microcode update.

No, hard errata is hard errata.
Like TSX in Zen3.

 

[DavidC1]

If it’s a bug, I hope it can be addressed via some sort of microcode update.

The problem is, we already know what to expect from Zen 6. If they are updating the clustered decode to work that way, a significant portion of the 10 or so percent gains will be entirely due to the decode change.