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Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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The sample with the date stamp is not a review sample. It's a show piece AMD is using as a prop.

No one with actual review samples has posted photos including MFG datestamps. They're blurred.
Wouldn't showing actual review samples be embargoed anyway? There are embargoes for unboxing. Wouldn't showing the CPU itself technically count as one?
 
Zen 5 sucks worse than zen 4 but is way better than zen 4 while being both worse and better than intel while being horrible for having 15% ipc gain despite having -15% ipc gain against zen 4 despite being faster than zen 4 except when it is slower than bulldozer.

Also, benchmarks, L3 cache, rings of Saturn, chicken fingers, arm instruction set, x86/64 registers.
 
Zen 5 sucks worse than zen 4 but is way better than zen 4 while being both worse and better than intel while being horrible for having 15% ipc gain despite having -15% ipc gain against zen 4 despite being faster than zen 4 except when it is slower than bulldozer.

Also, benchmarks, L3 cache, rings of Saturn, chicken fingers, arm instruction set, x86/64 registers.
Prompt: Take the following set of things and write a poem about Zen 5's launch and performance.

In the realm of silicon dreams, a new star did arise,
Zen 5 emerged, with benchmarks that mesmerize.
L3 cache, like treasure, deep and vast,
In the race of performance, it’s built to last.

Rings of Saturn, in the cosmic dance,
Reflecting Zen 5’s prowess, a celestial chance.
Chicken fingers fuel the coder’s night,
As they test and tweak, under the monitor’s light.

ARM instruction set, a rival in the fray,
Yet Zen 5’s x86/64 registers hold sway.
With power and grace, it conquers the test,
In the world of processors, it’s truly the best.
 
Zen 5 sucks worse than zen 4 but is way better than zen 4 while being both worse and better than intel while being horrible for having 15% ipc gain despite having -15% ipc gain against zen 4 despite being faster than zen 4 except when it is slower than bulldozer.

Also, benchmarks, L3 cache, rings of Saturn, chicken fingers, arm instruction set, x86/64 registers.
Post twice if you are having a stroke 😅
 
Still very respectable.
Well, it can do more, I'm pretty sure. Especially if AMD didn't do whatever they do with x3d chiplets that tanks thermal conductivity so badly. I guess they cut off top part of non-x3d chiplet, weld in the cache tile and then literally glue-in the structural silicon parts on top of cores (the hottest part of the chip), hence this +20C delta between non-x3d and x3d. If they've cared a bit more they could have at least glued it in properly or didn't cut out silicon above the cores at all (but I guess that'd incur extra 0.0002c of mfg costs so sucks to be us, so to say). Even without delidding and sanding the dies proper custom loop can easily take 1.25v with non-x3d parts in linpack etc, so with x3d silicon quality we could probably have something like 5.5 ghz all-core or even more.
 
I'm sure manufacturing and packaging costs come into it, but I would hope the #1 criteria with stacked cache is reliability and longevity?
 
I wonder whether he reset the stats or if these surprisingly low temps are legit. If so, then it can do much more with more watts or static OC
 
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