Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Page 611 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
Toggle sidebar Toggle sidebar
poke01

poke01

Diamond Member
Mar 8, 2022
4,231
5,567
106
CouncilorIrissa said:
So I calculated the integer and FP geomean for the 9900X and compared it to an average performing 7900X and this is what I came up with.
View attachment 102610
So around 15-16% in INT and 17-18% in FP (not an iso-clock comparison; that would be pointless anyway since there are too many unknowns about test setups. The 9900X is clocking around 5.65 GHz, whereas the 7900X around 5.45GHz).

GB versions are also slightly different, 6.2.2 for the 9900X and 6.3.0 for the 7900X, but the results should be comparable according to Primate Labs: "For systems without SME instructions, Geekbench 6.3 CPU Benchmark scores are comparable with Geekbench 6.1 and Geekbench 6.2 scores."
Click to expand...
SPEC scores are going to be fun. AMDs not topping anything here but good improvement over Zen 4
 
SarahKerrigan

SarahKerrigan

Senior member
Oct 12, 2014
735
2,036
136
Fjodor2001 said:
Then why the huge difference in perf improvement on server vs DT, if the core is the same? All the improvements you mentioned previously would be present on DT too.
Click to expand...

A ~30% clock improvement is a lot easier from 2.5GHz than at 5.7. This could literally be as simple as "Turin is capable of hanging out at higher frequencies for longer." 9654 can already theoretically boost up by 30% from base. Thing is, the magical "+50%" thing isn't here for us to review.

Anyway, I think it's entirely possible that large SMT improvements do exist. Folks like Adroc have insisted that isn't the explanation, but I don't put much stock in such claims at this point.
 
  • Like
Reactions: Tlh97, Makaveli, lightmanek and 4 others
F

Fjodor2001

Diamond Member
Feb 6, 2010
4,211
583
126
SarahKerrigan said:
A ~30% clock improvement is a lot easier from 2.5GHz than at 5.7. This could literally be as simple as "Turin is capable of hanging out at higher frequencies for longer." 9654 can already theoretically boost up by 30% from base. Thing is, the magical "+50%" thing isn't here for us to review.

Anyway, I think it's entirely possible that large SMT improvements do exist. Folks like Adroc have insisted that isn't the explanation, but I don't put much stock in such claims at this point.
Click to expand...
But wasn't the claim 32% IPC SPECint 2017 iso clock ST, i.e. at same frequency? Or do I remember incorrectly?

Also, why would the SMT improvements differ on server vs DT? And why applicable if we're talking ST perf anyway?
 
Markfw

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,247
16,108
136
Fjodor2001 said:
But wasn't the claim 32% IPC SPECint 2017 iso clock ST, i.e. at same frequency? Or do I remember incorrectly?

Also, why would the SMT improvements differ on server vs DT? And why applicable if we're talking ST perf anyway?
Click to expand...
I already tried to answer the server vs DT question. DT runs very high clock. Genoa server for 96 core, no. So 2.5 to 3.5 for server would be a 40% gain. (not that it will be.) DT will have little if any mhz gain IMO, server COULD
 
F

Fjodor2001

Diamond Member
Feb 6, 2010
4,211
583
126
Markfw said:
I already tried to answer the server vs DT question. DT runs very high clock. Genoa server for 96 core, no. So 2.5 to 3.5 for server would be a 40% gain. (not that it will be.) DT will have little if any mhz gain IMO, server COULD
Click to expand...
But wasn't the 32% IPC at iso clock?
 
M

Mopetar

Diamond Member
Jan 31, 2011
8,487
7,727
136
SarahKerrigan said:
Anyway, I think it's entirely possible that large SMT improvements do exist.
Click to expand...

From what we know there are cases where it could be massive, but without a complete picture it's rather difficult to say how likely those cases are. The split scheduler definitely makes it feasible, but that doesn't preclude the backend from being bottlenecked depending on what both threads are trying to do. I suspect there are a lot of cases where the CPU just fills up the instruction queue a bit faster and there's not much additional performance gain. Depending on what the threads are doing, it could create a lot of additional cache pressure that leans heavily on the chip having v-cache.
 
SarahKerrigan

SarahKerrigan

Senior member
Oct 12, 2014
735
2,036
136
Fjodor2001 said:
But wasn't the claim 32% IPC SPECint 2017 iso clock ST, i.e. at same frequency? Or do I remember incorrectly?

Also, why would the SMT improvements differ on server vs DT? And why applicable if we're talking ST perf anyway?
Click to expand...

The "32%" came from trying to extrapolate backwards from "96c +50% at int rate nT." This has been explained repeatedly. It would behoove you to read the thread instead of asking for things that have been answered over and over again.
 
  • Like
Reactions: Tlh97 and TESKATLIPOKA
F

Fjodor2001

Diamond Member
Feb 6, 2010
4,211
583
126
SarahKerrigan said:
The "32%" came from trying to extrapolate backwards from "96c +50% at int rate nT." This has been explained repeatedly. It would behoove you to read the thread instead of asking for things that have been answered over and over again.
Click to expand...
I know what you wrote, but that’s not how I recall it from where it was discussed previously in the thread (instead I recall it as I described). However this thread is several hundred pages, and the ”32% IPC” topic has been discussed multiple times, often with somewhat different description from time to time. So it’s very hard to establish any common ground truth of what the exact claim actually was.

That said, I think we can all agree on that we’re not even close to 32% IPC increase for Zen5 DT at least, based on the latest info/leaks that have been presented in the thread.
 
Last edited:
branch_suggestion

branch_suggestion

Senior member
Aug 4, 2023
828
1,812
106
Improvements to the sIOD can also improve n-rate workloads.
MLID did mention 11% less IPI, could be random BS but also could explain the last bit of socket level perf.
 
DrMrLordX

DrMrLordX

Lifer
Apr 27, 2000
22,905
12,975
136
CouncilorIrissa said:
It's just that you can arrive at the +50% (if it's real anyway) perf figure with more than just IPC increase, namely higher sustained clocks, SMT yield, etc.
Click to expand...

That would appear to be the case. We'll know more once we've seen extensive third-party benches (especially if/when servethehome and Phoronix get their hands on Turin).
 
  • Like
Reactions: lightmanek
coercitiv

coercitiv

Diamond Member
Jan 24, 2014
7,356
17,425
136
Fjodor2001 said:
I know what you wrote, but that’s not how I recall it from where it was discussed previously in the thread (instead I recall it as I described). However this thread is several hundred pages, and the ”32% IPC” topic has been discussed multiple times, often with somewhat different description from time to time. So it’s very hard to establish any common ground truth of what the exact claim actually was.
Click to expand...
Sigh, apparently when the thread is too long we get to ask other people to do the work for us.
Fjodor2001 said:
one can always in hindsight claim that some specific benchmark was being referred to (but wasn't mentioned explicitly!), and then cherry-pick a benchmark that fits the prediction that was made.
Click to expand...
StefanR5R said:
It was explained that SPEC int rate was referred to. The claims which primarily irritated some readers were about 1-threaded 1-copy SPEC int rate.
Click to expand...
Fjodor2001 said:
Ok, and what was the claimed performance increase for that benchmark, and which CPUs where being compared?
Click to expand...
Kepler_L2 said:
Core for core Zen5 is >40% faster than Zen4 in SPEC.
Click to expand...

And just in case you say "40%" is not the "32%" you're talking about, go look for the info yourself. Repeatedly asking the same question again and again does not contribute in any way to the conversation.

@SarahKerrigan and others have tried to give a reasonable explanation based on a very simple and likely outcome - that claims of 30%+ PPC (Performance Per Clock - equivalent to performance at ISO clocks) were made by mistake, by failing to properly account for difference in clocks and/or SMT contribution. That is one way to reconcile current data with past claims. The other one would be to completely discard past claims as being irrelevant.

Also, if I see one more person asking around if IPC claims are at iso clocks, I will personally slap them around with a huge rocket propelled trout.
 
  • Like
  • Haha
Reactions: FilletMignon, Tlh97, Joe NYC and 9 others
F

Fjodor2001

Diamond Member
Feb 6, 2010
4,211
583
126
coercitiv said:
Sigh, apparently when the thread is too long we get to ask other people to do the work for us.





And just in case you say "40%" is not the "32%" you're talking about, go look for the info yourself. Repeatedly asking the same question again and again does not contribute in any way to the conversation.

@SarahKerrigan and others have tried to give a reasonable explanation based on a very simple and likely outcome - that claims of 30%+ PPC (Performance Per Clock - equivalent to performance at ISO clocks) were made by mistake, by failing to properly account for difference in clocks and/or SMT contribution. That is one way to reconcile current data with past claims. The other one would be to completely discard past claims as being irrelevant.

Also, if I see one more person asking around if IPC claims are at iso clocks, I will personally slap them around with a huge rocket propelled trout.
Click to expand...
So you found some occurrences where Zen5 IPC was discussed. Great, should we be impressed? 🤣 But like you also concluded it was the 40% claim, not the 32% claim. And different attributes have sometimes been attached to the two different claims throughout the thread.

And my point was that there are many more occurrences in the thread where the Zen5 32% IPC has been discussed. And the info differs somewhat from case to case. A quick search found some additional ones:

Page 150 - Discussion - Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Page 150 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
forums.anandtech.com forums.anandtech.com

Page 148 - Discussion - Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Page 148 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
forums.anandtech.com forums.anandtech.com

I.e. SMT should not influence it.

Page 255 - Discussion - Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

Page 255 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
forums.anandtech.com forums.anandtech.com

Saying the 32% IPC was even with slight clock regression.

And the above were just examples. There are many more similar posts, often with somewhat different info from case to case. So I don't think there is one single clear definition of the 32% IPC claim unfortunately.

That said, I also think the explanations for the difference in Zen5 server vs desktop performance numbers possibly could be explained by factors mentioned recently in this thread. But as of now it's just a theory, since we don't have the necessary underlying data to prove it.
 
Gideon

Gideon

Platinum Member
Nov 27, 2007
2,030
5,035
136
branch_suggestion said:

ASUS System Product Name - Geekbench

Benchmark results for an ASUS System Product Name with an AMD Ryzen 5 9600X processor.
browser.geekbench.com
9600X
Now just waiting for the big boy.
Click to expand...
The slight regression in Navigation benchmark is odd (particularily as this is with clock speed bump), it seems to be there for all SKU result so far. It's minor and perfectly normal for an arch change, but I still wonder what causes it.
 
  • Like
Reactions: Tlh97 and lightmanek
F

Fjodor2001

Diamond Member
Feb 6, 2010
4,211
583
126
coercitiv said:
There's no "we". People have moved on. Maybe you should too.
Click to expand...
The first two sentences are contradictory. But maybe let's both agree to not use the Royal We / majestic plural or try to be a representitive of the "people" then. :)

Point is still that there is no single definition of the 32% IPC claim in the thread as shown by the recently quoted posts. This makes it hard to confirm or reject it. So if someone wants to confirm or reject one specific definition of the 32% IPC claim, then I think it has to be clarified which one.
 
You must log in or register to reply here.

TRENDING THREADS

COMPANY
RESOURCES
FOLLOW
Top Bottom