Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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igor_kavinski

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Jul 27, 2020
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Josh128 said:
9800X3D ST max boost is rumored to be 5.2GHz by Twitter bro.
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The X3D is a miracle of modern silicon engineering. So they could be a bit limited by the laws of physics. Big deal. It's still going to be better than what came before it. Seriously give the melodrama a rest :)
 
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Josh128

Josh128

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igor_kavinski said:
The X3D is a miracle of modern silicon engineering. So they could be a bit limited by the laws of physics. Big deal. It's still going to be better than what came before it. Seriously give the melodrama a rest :)
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Is the screenshot you will be posting from a mobile or desktop chip? You said laptop, right? Smells like a Strix Halo to me...
 
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MS_AT

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Jul 15, 2024
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darkswordsman17 said:
Didn't Intel remove HT because of the recurring security vulnerabilities which have proven near impossible to prevent because of the inherent issues that arise from shared resource allocation when doing multiple threads on a single core? That alone is worth it. For consumers, most of the SMT uses are for things like video encoding and similar, where its not time critical (or else you'd be paying for more cores anyway) or if it is you'll be using video encoder hardware acceleration (either integrated into the chip, in the GPU, or as a dedicated separate system if you need better quality or other like archiving at the same time like if you're a professional streamer or something). Or its something a GPU or other likely would be better suited for too.

I know there was also some discussion about software licensing which was based on core counts, which also could play a role, but that's more in server space, but the security aspect is even more critical there, and companies were moving to developing their own ARM designs to get around such licensing restrictions and security, but probably mostly IP protectionism.

Main reason AMD hasn't yet is that its easy performance for them to tout and still no one really cares about security. They can flip a switch and turn it off, then probably fuse it out, then probably have it not even in there like Intel has basically done as well, once there is need for that.

This is one of the few things I am 100% onboard with Intel doing and I wish AMD would as well (I believe turning it off does not simply turn off that attack vector, which is why Intel pretty rapidly went from disabling HT to removing it from the cores).
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If I am not mistaken first HT-related vulnerability was reported in 2005. We have 2024 now when they removed it;) Wouldn't call it fast. And if they really did it for security they would remove it from newest Xeons. The simplest explanation that they did it to make scheduling easier with two types of the cores and to save on validation time is the most fitting imo.

When it comes to AMD they have their own implementation. That seems to be doing better on the security front, of course it is also "younger" so might be we will see new ones popping up, but as well as with speculative execution, the idea itself is a clever way to boost CPU utilization so I guess companies will try to salvage it as much as possible.
 
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DrMrLordX

DrMrLordX

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darkswordsman17 said:
Didn't Intel remove HT because of the recurring security vulnerabilities which have proven near impossible to prevent because of the inherent issues that arise from shared resource allocation when doing multiple threads on a single core?
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At least as far as Zen4 and Zen5 go, AMD hasn't had any problems. That we know about.

darkswordsman17 said:
This is also an area I think Microsoft dropped the ball from 2 perspectives. They should have been requesting hybrid ARM/x86 chips (5 years ago)
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Mixed ISAs on package would have been very challenging.

igor_kavinski said:
I'll let you draw your own conclusions :p
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Some of that is bot/scraper traffic.

fastandfurious6 said:
Hide the Pain Gelsinger face = he knows 18A is secretly a pipe dream 😂😂
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Broadcom wasn't impressed. Though this thread isn't quite the right place to discuss such matters.
 
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igor_kavinski

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Come on, all you lazy boys (and girls?), tell you what? The screenshot is 9800X3D with Dawntrail score and CB R23 score and some other stuff that can help you guys estimate the possible OC headroom.

Two screenshots posted. 8 more to go!
 
Josh128

Josh128

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Standard laptop ran at 4K for some reason, had to adjust the "display" tab to 1280x720. It asked if I wanted to save as Preset 1 and I clicked yes, thats why it says Preset 1 here. Regardless, I aint breaking no records here. :laughing:
1729461850071.png
 
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Josh128

Josh128

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I put up a notice at WCCFTECH to see if any of the Intel fanatics there to put up their screenshots if they are brave enough and I will post here if they dont have an account. I doubt any of them will take up the challenge, but it'd be fun to see if they did.

**EDIT: Two of the 'tards of the Round Table have responded, and both of them are too scared to participate. All they do all day everyday is say how their Raptor Lake chips are faster than anything AMD has, but when it comes down to downloading and running a simple benchmark, they duck and run like the sad little trolls they are.

**EDIT 2: At least 4 prominent members of the table have responded, all have tucked tail and refused to run bench.
 
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lightmanek

lightmanek

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Thunder 57 said:
Can't you turn off CCD's in Zen Master? If not, couldn't you always set affinity to only use one CCD on that benchmark?
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I can't install Ryzen Master, I've tried. My Windows is too old and probably previous versions of this tool left some garbage. It just starts installer, unpacks and that's it. Tried few times already.

As for core affinity, I was going to try, but then wife called me ... so no time till tomorrow evening (UK 11.30PM now)
 
Saylick

Saylick

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naukkis said:
You suppose that his code uses FMA? SSE2 in x64 mode has also 16 registers, 8 limitation is only in 32bit mode.

Intel actually offers great performance monitoring programs so developer doesn't need to guess where code is bottlenecked.
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MS_AT said:
He mentioned GEMM and GEMM will use FMA if available so it could use it. Since SSE2 predates x64 its hard to say if his software was compiled for x86 or x64.

But yes without profiling we can mostly throw around random guesses;)
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The software was re-compiled to run in x64 mode, but I just double checked my email correspondence with the software vendor from 2017 so I must issue a correction: it utilizes SSE3, not SSE2. I have not reached out to them in recent history to see if they updated the underlying analysis engine to take advantage of newer vector instruction sets (i.e. AVX2), but I have not seen anything in the update logs to suggest they have.

I'm a complete noob when it comes to profiling, but I suppose it can't hurt. I'm guessing this page is a good start? https://www.intel.com/content/www/u...pc-performance-characterization-analysis.html
 
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