- Mar 3, 2017
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How does Zen 3 IPC gain have anything to do with Zen 5 uarch? Can you discuss it somewhere else or do we have this thread blocked again?
They didn't, it's just physdes flexing.
How many times do I have to tell everyone that AMD does a proper tock every other gen (they're odd-numbered) and every even is iterative.
When I said, "same methodology", I mean humoring the idea that "MT IPC" is an actual metric that can be measured in the way AMD marketing presented. They just used a different set of tests for the sake of comparison. That's not some standard part of their reviews, is the point.You are lying here, dunno why you re acting like this.
When I said, "same methodology", I mean humoring the idea that "MT IPC" is an actual metric that can be measured in the way AMD marketing presented. They just used a different set of tests for the sake of comparison. That's not some standard part of their reviews, is the point.
Anyway, going back to the original purpose of assessing rumor mongers, there's any number of things from their history you can point to to know they're making it all up. They take advantage of you giving them this benefit of the doubt for views (money), even if they have to lie to your face to do so. It's just not worth anyone's time to take such claims seriously.
Again, copying the methodology, but different test suite, hence different results.I thought that you noticed that Computerbase metrics ,separating ST and MT numbers as well as not using games, are completely different from AMD
Yes, Zen 5 in all likelihood will be a bigger IPC jump than Zen 4. Overall performance, however, might not be, if they don't get a meaningful frequency boost as some are alleging. Would fit better into the pattern of Zen 3, which makes sense given that that was also a new architecture, though by a different team, iirc. Clearly they originally wanted to use N3.So they are reworking parts that are instrumental to extract more IPC, wich tell us that a significantly bigger improvement than what was brought by Zen 4 is more than likely.
Again, copying the methodology, but different test suite, hence different results.
Yes, Zen 5 in all likelihood will be a bigger IPC jump than Zen 4. Overall performance, however, might not be, if they don't get a meaningful frequency boost as some are alleging. Would fit better into the pattern of Zen 3, which makes sense given that that was also a new architecture, though by a different team, iirc. Clearly they originally wanted to use N3.
Regarding tick-tock, This is simply not true.
Zen1, Zen+, Zen 2, and all variants = family 17h
Zen 3, Zen3+, Zen 4, and all variants are 19h
Zen 5 is 1Ah.
You should reread my comments, because I addressed all of that several times now. I'll ignore the rest of your attempted provocation.Rather than aknowledging that you were wrong you keep being in denial, different methodologies hence different results, theres s no separation of ST, MT and games in AMD s slide
4nm does not give a significant improvement vs 5nm, and that's even assuming all these design/architecture changes have no impact on the critical path, which is unlikely.There will be a significant uplift because they ll use 4nm instead of 5nm, wich will give a lttle room to improve perf
When originally planning for the core, they most likely assumed a healthy N3 with noticeable improvements over 5nm. But TSMC slipped, and so they had to retarget N4 instead.they know well for ages that they couldnt rely on a vastly better process for this gen
You should reread my comments, because I addressed all of that several times now. I'll ignore the rest of your attempted provocation.
4nm does not give a significant improvement vs 5nm, and that's even assuming all these design/architecture changes have no impact on the critical path, which is unlikely.
When originally planning for the core, they most likely assumed a healthy N3 with noticeable improvements over 5nm. But TSMC slipped, and so they had to retarget N4 instead.
To just point out the most glaring of many inaccuracies here, 6% better perf/watt means ~6% lower power at iso-frequency, not 15%. Fabs would call the other metric performance. But if I have to once again repeat common knowledge, I think this conversation no longer has value.N3, FI N4P has 6% better perf at isowatt than N4, this allow to reduce power by about 15% at isofrequency comparatively to N4.
To just point out the most glaring of many inaccuracies here, 6% better perf/watt means ~6% lower power at iso-frequency, not 15%. Fabs would call the other metric performance. But if I have to once again repeat common knowledge, I think this conversation no longer has value.
That s 6% better perf (not perf/watt) from N4 to N4P wich mean 6% higher frequency at same power, and since TSMC s process scale at P = F^2.6 slope it means that at same frequency power is 1/1.06^2.6, that is 0.86x the power.
From N5 to N4P, since Zen 4 use the former, perf is 11% better at same power, this means that at same frequency power is 1/1.11^2.6 = 0.76x.
The only accuracies are from the one that do understand jack to semiconductors physics, i understand better why you thought that Zen 5 wouldnt perform much better...
Where did you get the information for the exponential function of TSMC's process scaling? Have they actually made that public or are you relying on reverse engineering other data?
If you look at just AMD's statements on the matter, and ignore the internet commentary, they've said nothing bad about hybrid. Around ADL's launch, they basically just said they would wait till the software ecosystem had adapted. I think it's pretty likely that they will eventually do an 8+16 flagship SKU. The biggest problem is that their small core development is serialized behind the big core, and the desktop chips are the first things they launch on a new arch. They will need to shift to doing those in parallel, but iirc, there were already some rumors along those lines.With AMD essentially stating that they aren't chasing Intel's strategy of shoveling small cores into a processor
AMD didn't say that they won't add small cores. They said that they will not mix cores that need software to run differently on each core. Papermaster also said that the reason they are not going over 16 cores is because the memory can't keep up in a dual-channel format.
Just FYI, MLID showed some road map where Turin Dense came ahead of regular Turin.If you look at just AMD's statements on the matter, and ignore the internet commentary, they've said nothing bad about hybrid. Around ADL's launch, they basically just said they would wait till the software ecosystem had adapted. I think it's pretty likely that they will eventually do an 8+16 flagship SKU. The biggest problem is that their small core development is serialized behind the big core, and the desktop chips are the first things they launch on a new arch. They will need to shift to doing those in parallel, but iirc, there were already some rumors along those lines.
AMD didn't say that they won't add small cores. They said that they will not mix cores that need software to run differently on each core. Papermaster also said that the reason they are not going over 16 cores is because the memory can't keep up in a dual-channel format.
Considering where things stand:I don’t buy that argument about memory bandwidth at all.
Motherboard OEMs are beginning to roll out test BIOS versions with a new AGESA that supports the fastest DDR5 speeds out there. In addition, memory speeds are already significantly faster than what DDR4 is capable of. Intel also has no issues with higher core counts. Finally, who cares if some workloads are limited by bandwidth? The hypothetical 8+16 chip will still be faster.
They could also solve things by moving to a quad channel setup for high end enthusiast offerings.
If they dropped a quad channel board and a 24c CPU that beats up the 7950X many of us would buy it in a heartbeat.
Why wouldn't anyone at AMD see an opportunity in that? Enthusiasts already pay quite a bit for the AM5 flagship CPU/mobo combo so they may not mind paying a bit more for a higher end chipset with quad channel RAM. AMD can keep 6,8 and 12 channel RAM for workstation and servers.The chances of AMD releasing 4 memory channel socket are near zero.
It would be a large platform investment for a very small volume. Socket and mobo pricing is extremely sensitive to volume. And of course, you'd need a 4ch die...Why wouldn't anyone at AMD see an opportunity in that? Enthusiasts already pay quite a bit for the AM5 flagship CPU/mobo combo so they may not mind paying a bit more for a higher end chipset with quad channel RAM. AMD can keep 6,8 and 12 channel RAM for workstation and servers.
Volume could increase depending on how tangible the gains are.It would be a large platform investment for a very small volume.