C6 Report enabled with the earlier uCode *will* cause hang-ups (catastrophic error reported by MB HW indicator if you have one for each socket).
This is a known "feature" of the CPU under light load (let me guess, you usually go away and come back to a frozen screen) that was corrected in later uCode but you lose the higher AVX multipler.... so... ENABLE C0/C1, ENABLE C3, DISABLE C6.
Have found enabling C3 vice C6 gives the same benefit (lower power usage at idle) AND allows for higher AVX multi AND is perfectly stable. I've been up for months now without a reboot.
I don't use any µcode (reason why will be below).
No, I sit in front of my computer, but yes, the system is under light load or in idle when that happens. I don't remember it ever happening under load and I've read on some forum that it has to do with the inability of the cores to go into C6 power saving state (basically powering off) when negative voltage offsets are applied to them.
By the way, I get the same thing with µCU versions 1F, 27, 39 and 3A applied.
Thanks, I'm going to do that and then see if the system freezes!
3. Run me_cleaner (requires Python)
4. Modify to allow changes to SEC/CORE
5. Remove Haswell-E Microcode using UBU
6. Flash using external SPI device
Are you saying that ASUS BIOS Flashback will not accept the BIOS with ME disabled?
_____________________________
kjboughton, I've started compiling your UEFI DXE RC9 driver (I need my own offsets for my E5-2696s which are different - one CPU is Prod. unit (
SR1XK), the other is Eng. sample (
QGN7)), but I have an issue with that and a couple of questions.
1. I can't manage to compile the code without commenting out the following rows:
If I don't do that, then the build fails like this:
What is happening and why? I only have
some knowledge of programming as I had it as a subject in a university, but I am no expert to really understand what's the issue here. So what is this about and what should I do? By the way, commenting out that small part of the code doesn't affect the driver's functionality in any way, I'm actually posting this from my workstation with this driver applied.
2. What should happen if I set
CPU_SET_OC_LOCK constant as
TRUE? What is this option for?
3. I always have double start when I power on my PC. It doesn't happen on reset and on warm boot, but it
ALWAYS happens at cold boot. What can be causing this? Even changing BIOS settings and flashing an older version doesn't help.
4. Since I need maximum performance in Corona Render, I use µcode revision
1F. That way I used to get the same turbo boost in AVX2 workloads as in all other workloads (on my X99 ASUS board).
But here, on this motherboard with two CPUs I have a very strange issue. In regular workloads both CPUs boost well and the difference between them is minimal, like the one that I observed on my single socket ASUS mobo (where SR1XK is 100 MHz better than QGN7, x34 as opposed to x33). But the results that I get, say, in Cinebench, are less than I expected (a little above 5200 points, but nothing near 2*2800=5600 that I would want).
But the most trobling issue is the following. When I run Corona Benchmark or Corona Render, the SR1XK's cores all drop to x27 (consuming significantly less power and therefore heating up to a smaller degree), whereas QGN7's cores fluctuate around x32-x33 all the time. Enabling C3 and disabling C6 doesn't change anything. Two questions arise:
a) why does this drop happen in AVX2 workload at all (even though with 3A µcode I get x29), and
b) why does it seem like it's some other issue unrelated to the TDP? Like I said, the SR1XK cores are very stable at x27, there's no fluctuation at all, as if their frequency got artificially limited or cut by some feature, whereas QGN7 seems to actually reach it's TDP limit, hence the constant fluctuation (from uneven workload).
I tried swapping the CPUs, but it doesn't make any difference. Using your original pre-compiled RC9 drivers doesn't change anything either (powercut versions included). The SR1XK still boosts very poorly in AVX2. I even tried to remove QGN7 altogether and use SR1XK on its own in this motherboard - I got the same thing, x27 all-core in AVX2 with 1F µcode.
Therefore, for now, I use the system with no µCU loaded. I know it's against your recommendations (you said it's not optimal because 'bare' silicon has unfixed bugs in it and consumes more power), but I wanted to stress the system fully for test purposes.
By the way, in HWiNFO to the right from the Configurable TDP Level 1 (Down) wattages it says 1900 MHz for SR1XK and 2000 MHz for QGN7. What does this mean and where does this difference come from? Can it be relevant somehow?
