Thoughts on "8 Core" Bulldozer and "4 Core Sandy Bridge"

[Topweasel]

You are way out there man . Ya ever here of of a company called DEC . You should actually do some research . point to point has been around way befor AMD used it . AMD licensed X86 . In the hardware industry If you licensed someones IP if you make improvements on said IP the orginal owner In most cases still owns the IP you developed off there license . Thats the way it is . As for AMD paying intel for each cpu they prodice thats over AMD pays intel nothing . Yes it does allow for full sharing . AMD can use AVX , But They can't use prefix of Vex. Its in intel white paper. I can't believe that you think AMD invented point to point . or AMD HT Everthing you said is basicly wrong Amd pioneered 64 bit thats true but it was developed on intels IP which means intel owns it and Amd can use it . MS and AMD conspired on 64 bit hammer. SSE is an intel invention . AMD was first to use ondie memory controller on x86. But everyone that talked the talk befor c2D couldn't walk the walk after its release so that ondie memory comtroller was befor its time on desktop . but not so much on server. qpi is intels point to point not amds amds is ht and amd didn't invent it . amd did only 64 bit hammerand that was done on intels ip

Did I say point to point? I know of DEC and EV6. I said that looking at the design of QPI and its goals as point to point system. I am sure it shares IP with HT (which is open anyways).

But no, you are wrong you don't automatically gain the IP of something that was developed on top of it. Intel owns 64-bit as much as AMD does. Those 64-bit registers are in AMD's portfolio and not Intel. AMD can't make a 64-bit CPU without their agreement with Intel any more then Intel could do the same.

Research a little bit into SSE. You will actually find that half of the tech included in SSE, was actually from 3Dnow. 3Dnow Pro, included SSE I and new instructions. Where Intel proceeded to include those and more with SSEII. As Intel was developing SSE3, AMD do to lack of use of 3dnow, adopted SSE in there chips after the Athlon XP.

I don't even know how to understand what you are talking about in terms of On die memory controllers. Regardless of what you are getting at. Point is that AMD as a pioneer in that technology has a lot of IP, that without the cross licensing agreement would not be available to Intel. Could Intel have pulled it off eventually? Sure but they didn't have to start from the ground up, AMD paved the way and handed them the technology to do so.

Which that is the point of everything. Its a much more of a two way street then you think it is for what ever reasons you think the way you do. Sure in the 586/K5/K6 days it was much more AMD gaining Intel's tech then the other way around. But both have been innovating pretty heavily in the last decade, and both have had to or choose to adopt technologies in each others portfolio. Which makes both of them need each other. AMD isn't the Apple Microsoft couldn't watch die, No Intel needs AMD alive more then just keep the government off their backs, they need AMD to be able to sell the products they do.

 

[Tuna-Fish]

You are way out there man . Ya ever here of of a company called DEC . You should actually do some research . point to point has been around way befor AMD used it . AMD licensed X86 . In the hardware industry If you licensed someones IP if you make improvements on said IP the orginal owner In most cases still owns the IP you developed off there license. Thats the way it is.

No, it's not. That's not how it works. That's called derivative work -- the developer of the new tech doesn't have full rights to it, but neither does the original licensee. Neither can use it without the permission of the other party. And yes, while there is a lot of DEC IP in AMD designs, there is plenty of pure AMD there too. (Especially in graphics -- it is literally impossible to make a DX11 GPU without a license from AMD, thanks to all the ATi patents.) CPU's are such a fast-moving field partly because everyone in the game owns enough IP that nobody can make CPUs without permission from everyone else. This means that nobody can lock up the field with a bunch of patents they refuse the license.

(That's also the reason why Intel keeps AMD on life support -- the scariest possible future for Intel is AMD going bankrupt and somebody who doesn't make processors purchasing the patents off the corpse.)

AMD can use AVX , But They can't use prefix of Vex. Its in intel white paper.

AMD can and will implement the instructions with VEX prefix in it's processors -- but it cannot add new ones to the VEX coding space. They would like to do this because the x86 instruction tree is rather crowded, and VEX is more or less the only prime real estate left -- all the other spots have various disadvantages. There would be room for AMD's new instructions in VEX, and there is no legal reason AMD couldn't do it, but Intel has decided to be a bit anti-social and not reserve anything for AMD, so AMD cannot add new ones because Intel might add theirs that alias them.

 

[Nemesis 1]

http://www.lanl.gov/orgs/hpc/salishan/salishan2011/3moore.pdf

Yes we know Intel is working on cpu's Apu is nothing more than a name AMD uses.

Thats not what I was getting at . IF x86 allows full sharing than Intel can copy and use AMDs cpu on die with llano . AMD paid 5 billion for ATI . If full sharing is allowed Intel could just reverse engineer the AMD APU if its all that . What is that slide for you posted AMD intel can't be AMD . AMD engineers said using the low level cache won't work because of thrashing so it must be Intels right . Or was AMD talking aloud again. Ok after looking over the PDF I see . Thats interesting stuff . Good read . Thats along time away for concepts . But it is good fun to read.

 

[garagisti]

Yes we know Intel is working on cpu's Apu is nothing more than a name AMD uses.

Thats not what I was getting at . IF x86 allows full sharing than Intel can copy and use AMDs cpu on die with llano . AMD paid 5 billion for ATI . If full sharing is allowed Intel could just reverse engineer the AMD APU if its all that . What is that slide for you posted AMD intel can't be AMD . AMD engineers said using the low level cache won't work because of thrashing so it must be Intels right . Or was AMD talking aloud again. Ok after looking over the PDF I see . Thats interesting stuff . Good read . Thats along time away for concepts . But it is good fun to read.

Granpa, you know a lot of stuff and have a lot of knowledge to share... just get off your high horse, be a little humble... even most people who work for Intel aren't as quick to write off AMD... except dr.who

True Intel doesn't share... they will rig their compilers to cripple AMD (as they've consistently done)... read Agner Fog's blog. It is not because of how whole x86 licensing works, its just that Intel doesn't play fair. Plain and simple. Ahh, so you may want some proof. Here you go...
http://www.guru3d.com/article/asus-sabertooth-990fx-review/15

 

[LOL_Wut_Axel]

Since you seem to know the prices of both of these unreleased products, please share.

I don't need to. I just (and most everyone does) know that due to the public roadmap that SB-E is an Enthusiast CPU and platform. That means higher costs. Exactly the same situation as Lynnfield and Nehalem, where Lynnfield was Performance and Nehalem was Enthusiast.

 

[tweakboy]

I think more and more people should care about their PC and buy top end parts not parts from China ...couhgs.. LG lol

 

[Fallen Kell]

An 8GHz CPU will always be twice as fast as a 4GHz one. A dual core 4GHz CPU will be somewhere between 0-100% faster than a single core.

I think you need to make a big caveat on that statement. The SAME CPU running at 8GHz will be twice as fast as a 4GHz CPU, if and only if the system buses and CPU cache can handle the increase in data throughput.

Notice that I also capitalized "same", because comparing a 3.2GHz Intel i2500 vs a 3.2GHz Intel P4 is no comparison as to which is "faster"... I mean, that is one of the reasons why the PowerPC CPU's running at 866 MHz were more than DOUBLE the speed (time) of Intel P4 1.7 GHz in certain tasks even though it was "HALF" the speed (clock frequency) of the Intel:
http://www.youtube.com/watch?v=I3WnXaWjQYE

It is all about how many tasks you complete in that 1 clock. If it takes you 2 clock cycles to perform a calculation on 1 CPU, but on another only takes 1 clock cycle, and the first CPU is running at 3.4 GHz, and the second is running at 2.1 GHz, you want to buy the second CPU if that is the calculation you care about doing the most.

 

[Nemesis 1]

Did I say point to point? I know of DEC and EV6. I said that looking at the design of QPI and its goals as point to point system. I am sure it shares IP with HT (which is open anyways).

But no, you are wrong you don't automatically gain the IP of something that was developed on top of it. Intel owns 64-bit as much as AMD does. Those 64-bit registers are in AMD's portfolio and not Intel. AMD can't make a 64-bit CPU without their agreement with Intel any more then Intel could do the same.

Research a little bit into SSE. You will actually find that half of the tech included in SSE, was actually from 3Dnow. 3Dnow Pro, included SSE I and new instructions. Where Intel proceeded to include those and more with SSEII. As Intel was developing SSE3, AMD do to lack of use of 3dnow, adopted SSE in there chips after the Athlon XP.

I don't even know how to understand what you are talking about in terms of On die memory controllers. Regardless of what you are getting at. Point is that AMD as a pioneer in that technology has a lot of IP, that without the cross licensing agreement would not be available to Intel. Could Intel have pulled it off eventually? Sure but they didn't have to start from the ground up, AMD paved the way and handed them the technology to do so.

Which that is the point of everything. Its a much more of a two way street then you think it is for what ever reasons you think the way you do. Sure in the 586/K5/K6 days it was much more AMD gaining Intel's tech then the other way around. But both have been innovating pretty heavily in the last decade, and both have had to or choose to adopt technologies in each others portfolio. Which makes both of them need each other. AMD isn't the Apple Microsoft couldn't watch die, No Intel needs AMD alive more then just keep the government off their backs, they need AMD to be able to sell the products they do.

You are sure point to point with HT . I rather doubt it . It shares with DEC is more likely. As Dirk came from dec. Point to point is older than I am.

Your 3Dnow was a failure To suddenly say it share bites with sse is a red harring . Fact is intel introduced SSE.

Intel already had 64 bit tech on itanic . A future chip such as Haswell will have more in commom with Itanic than AMD64 . VLIW is the future and that is EPIC . Haswell will combine features from Intels complete IP. Intel had to use AMD 64 they were between a rock and a hard place. AVX is proof of the move towards IA64. Scatter gather is a feature on larrabee that will also be on haswell. The memory controller on die . Who really cares Intel proved its point on C2D thats the biggest point of all. Intel owes more to Rambus tech than to anyone on the memory controller than any other company as intel licensed their tech . Than we have the Prefix of vec an intel exclusive which really cripples FMA4.

Your only solid point is AMD64 which by the time haswell arrives will be a none issue as intel will likely be using wholelly its IA64 IP. EPIC= VLIW that is IA64. AMD 64 is a dead end.

Than the 1 oint that stand above all else in debate points . AMD can not sell X86 tch . Only intel can . Why because Intel owns X86.

 

[Nemesis 1]

Granpa, you know a lot of stuff and have a lot of knowledge to share... just get off your high horse, be a little humble... even most people who work for Intel aren't as quick to write off AMD... except dr.who

True Intel doesn't share... they will rig their compilers to cripple AMD (as they've consistently done)... read Agner Fog's blog. It is not because of how whole x86 licensing works, its just that Intel doesn't play fair. Plain and simple. Ahh, so you may want some proof. Here you go...
http://www.guru3d.com/article/asus-sabertooth-990fx-review/15

Thats really not true about the compilers. Intels compilers still give AMD the best performance boost . Is was intel does is they make the cpu arch so that a differant path is used by the compilers so max.To max their Arch a path that AMDs cpus dom't have.

 

[Arachnotronic]

Your only solid point is AMD64 which by the time haswell arrives will be a none issue as intel will likely be using wholelly its IA64 IP. EPIC= VLIW that is IA64. AMD 64 is a dead end.

What?!

 

[Edrick]

Your only solid point is AMD64 which by the time haswell arrives will be a none issue as intel will likely be using wholelly its IA64 IP. EPIC= VLIW that is IA64. AMD 64 is a dead end.

Where did you read that?

 

[GammaLaser]

Your only solid point is AMD64 which by the time haswell arrives will be a none issue as intel will likely be using wholelly its IA64 IP. EPIC= VLIW that is IA64. AMD 64 is a dead end.

The latest IA64 CPU, Poulson, has been moving away from the VLIW concept. It breaks up the VLIW into component instructions and runs them through a pseudo-OOO engine. So really its the IA64 concept of software-based scheduling that is dying.

But I don't understand what this has to do with SIMD or AMD64.

 

[Arachnotronic]

IA64 is dead, dead, dead! x86-64 with extensions is the way forward (unless you're nvidia in which case, ARM will rule the day!)

 

[Nemesis 1]

No, it's not. That's not how it works. That's called derivative work -- the developer of the new tech doesn't have full rights to it, but neither does the original licensee. Neither can use it without the permission of the other party. And yes, while there is a lot of DEC IP in AMD designs, there is plenty of pure AMD there too. (Especially in graphics -- it is literally impossible to make a DX11 GPU without a license from AMD, thanks to all the ATi patents.) CPU's are such a fast-moving field partly because everyone in the game owns enough IP that nobody can make CPUs without permission from everyone else. This means that nobody can lock up the field with a bunch of patents they refuse the license.

(That's also the reason why Intel keeps AMD on life support -- the scariest possible future for Intel is AMD going bankrupt and somebody who doesn't make processors purchasing the patents off the corpse.)

You should read how this applies to Imagination Tech . Somehow Intel made a deal with them were they can change the arch . But none else can .



AMD can and will implement the instructions with VEX prefix in it's processors -- but it cannot add new ones to the VEX coding space. They would like to do this because the x86 instruction tree is rather crowded, and VEX is more or less the only prime real estate left -- all the other spots have various disadvantages. There would be room for AMD's new instructions in VEX, and there is no legal reason AMD couldn't do it, but Intel has decided to be a bit anti-social and not reserve anything for AMD, so AMD cannot add new ones because Intel might add theirs that alias them.

You should read how this applies to Imagination Tech . Somehow Intel made a deal with them were they can change the arch . But none else can

No AMD can not use the Prefix of VEX and thats a fact. I can show you were Intel says its Intel exclusive . That why AMD uses a differant coding scheme . Its now up to you To prove AMD can Use prefix of Vex

 

[Nemesis 1]

The latest IA64 CPU, Poulson, has been moving away from the VLIW concept. It breaks up the VLIW into component instructions and runs them through a pseudo-OOO engine. So really its the IA64 concept of software-based scheduling that is dying.

But I don't understand what this has to do with SIMD or AMD64.

AVX and the prefix of vex. Intel is moving away from VLIW while the rest of the industry is embracing it. Not likely. In larrabee for LBN there is a software layer running . Care to tell us about that software layer.

 

[Dresdenboy]

An 8GHz CPU will always be twice as fast as a 4GHz one. A dual core 4GHz CPU will be somewhere between 0-100% faster than a single core.

In addition to what Fallen Kell said:
Latencies also play a significant role. Let's look at a simple case: the 4 or 8GHz CPU has to process instructions, which are dependent on an older instruction, which loads some data. If the data is available, all newer instructions (say: 20) would process at the given clock speed and a throughput of 1/cycle.

Case 1:
That data element is in the L1 cache (3 cycles latency):
Processing time 3+20 or 23 cycles at 4 resp. 8GHz.

Case 2:
Data element is not in any cache, so it has to be loaded from memory (40ns latency or 160 resp. 320 cycles).
Processing time: 160+20 = 180 cycles at 4GHz, 320+20 = 340 cycles at 8GHz.

Since this is sometimes very difficult to avoid, this memory barrier will pose a ceiling to performance gained by pure clock frequency scaling.

 

[Tuna-Fish]

No AMD can not use the Prefix of VEX and thats a fact. I can show you were Intel says its Intel exclusive . That why AMD uses a differant coding scheme . Its now up to you To prove AMD can Use prefix of Vex

Intel saying "Intel Exclusive" means nothing. BD and other future AMD chips will execute instructions defined by Intel that have use the VEX prefix.

All SSE5 instructions that were equivalent or similar to instructions in the AVX and FMA4 instruction sets announced by Intel have been changed to use the coding proposed by Intel. Integer instructions without equivalents in AVX were classified as the XOP extension.The XOP instructions have an Opcode byte 8F (hexadecimal), but otherwise almost identical coding scheme as AVX with the 3-byte VEX prefix.

What this all is about is that Intel hasn't given AMD any of the VEX coding space. So AMD cannot use the VEX prefix for new instructions that they define. This will not stop them from supporting all the instructions that Intel adds.

 

[Tuna-Fish]

AVX and the prefix of vex. Intel is moving away from VLIW while the rest of the industry is embracing it. Not likely. In larrabee for LBN there is a software layer running . Care to tell us about that software layer.

WTF?

Intel is abandoning VLIW. It's only useful in HPC -- for most normal loads, including server loads, it is an extremely awful idea. Even the newest Itanium dumps some of the VLIW ideas and instead schedules single instructions.

 

[Nemesis 1]

No, it's not. That's not how it works. That's called derivative work -- the developer of the new tech doesn't have full rights to it, but neither does the original licensee. Neither can use it without the permission of the other party. And yes, while there is a lot of DEC IP in AMD designs, there is plenty of pure AMD there too. (Especially in graphics -- it is literally impossible to make a DX11 GPU without a license from AMD, thanks to all the ATi patents.) CPU's are such a fast-moving field partly because everyone in the game owns enough IP that nobody can make CPUs without permission from everyone else. This means that nobody can lock up the field with a bunch of patents they refuse the license.

(That's also the reason why Intel keeps AMD on life support -- the scariest possible future for Intel is AMD going bankrupt and somebody who doesn't make processors purchasing the patents off the corpse.)





AMD can and will implement the instructions with VEX prefix in it's processors -- but it cannot add new ones to the VEX coding space. They would like to do this because the x86 instruction tree is rather crowded, and VEX is more or less the only prime real estate left -- all the other spots have various disadvantages. There would be room for AMD's new instructions in VEX, and there is no legal reason AMD couldn't do it, but Intel has decided to be a bit anti-social and not reserve anything for AMD, so AMD cannot add new ones because Intel might add theirs that alias them.

AMD is allowed to use Vex . None said they couldn't . In the Vec space fits the Prefix of Vex . AMD can't use prefix of Vex. Intel and Amd must have come to some agreement . Other wise Intel could use ATI tech that AMD paid 5 billion for . As far as Intel using AMD /ATI IP . Intel paid NV 1.5 billion for something . AMD likely uses more of NV ip than NV uses ATI IP

 

[Nemesis 1]

WTF?

Intel is abandoning VLIW. It's only useful in HPC -- for most normal loads, including server loads, it is an extremely awful idea. Even the newest Itanium dumps some of the VLIW ideas and instead schedules single instructions.

Thats really is a statement that goes against everthing we now . What software layers that are used isn't known to me/US. Haswell is rumored to use a victor engine like larrabee. To say were moving away from vliw is unwise . How the compilers recode is big part of this . Big debate going on about trinity APU right now is if it will use VLIW4 or VLIW5 . As already stated Haswell will like use components of larrabeeLBN this uses a software layer. imagination tech uses VLIW as do many others . Brook for ATI was largely a fail . We know that AMD is embracing open cl . which requires a recompile from C99 to c++ . Intel also has do this . But in the case of haswell Intel will likely have a software layer running also to converge its IP.What emulation intel is doing is unknown to us.

 

[Tuna-Fish]

AMD can't use prefix of Vex.

What do you mean with this statement. Please explain what AMD can and cannot do, using concrete examples. My take is that AMD processors will (eventually) execute all instructions defined by Intel that have the prefix VEX, but AMD cannot define it's own instructions that use VEX.

Thats really is a statement that goes against everthing we now

So, you mean that in Haswell the onboard CPU uses a VLIW architecture? That would make sense. Haswell CPU cores absolutely will not use VLIW in any form. Because VLIW is a stupid idea in general-purpose computing.

 

[Arachnotronic]

What I'm thinking Haswell will be is: 4-8 "next gen" CPU cores + a cluster of Larrabee-like cores as a sort of FPU acceleration hardware. It'll all be general purpose, unlike the current IGP stuff...

 

[Nemesis 1]

Intel EXCLUSIVE means exactly what it says period . AMD can't use it in their code and they cann't overlap intels coding that is used in the Vex prefix. Which hurts FMA4 coding path for AMD there is no and if and buts to this . As I said the burden of proof lies with you to prove that AMD can use the EXCLUSIVE intel prefex of VEX. So far you have offerred no link from AMD saying they could . Get a link and you may have a valid point . Until than its all hot air. The fact the AMD already uses a differant code path is hard to overcome . Your insistance that intel is moving away from VLIW is not a true statement. Or the Prefix of Vex or Vex wouldn't even exist

 

[podspi]

What I'm thinking Haswell will be is: 4-8 "next gen" CPU cores + a cluster of Larrabee-like cores as a sort of FPU acceleration hardware. It'll all be general purpose, unlike the current IGP stuff...

Would be very interesting if true. I wonder how many "threads" such a CPU would support. I read somewhere a while ago that Intel was moving away from 'cores' entirely and Haswell was going to be a sort of super-module, with a set number of threads executable simultaneously.

I doubt its true, but it is an interesting idea. AMD seems to be going in that direction somewhat.

 

[Arachnotronic]

AMD tends to set architectural trends...Intel just executes better.