Thoughts on "8 Core" Bulldozer and "4 Core Sandy Bridge"

[drizek]

I think you need to make a big caveat on that statement. The SAME CPU running at 8GHz will be twice as fast as a 4GHz CPU, if and only if the system buses and CPU cache can handle the increase in data throughput.

Notice that I also capitalized "same", because comparing a 3.2GHz Intel i2500 vs a 3.2GHz Intel P4 is no comparison as to which is "faster"... I mean, that is one of the reasons why the PowerPC CPU's running at 866 MHz were more than DOUBLE the speed (time) of Intel P4 1.7 GHz in certain tasks even though it was "HALF" the speed (clock frequency) of the Intel:
http://www.youtube.com/watch?v=I3WnXaWjQYE

It is all about how many tasks you complete in that 1 clock. If it takes you 2 clock cycles to perform a calculation on 1 CPU, but on another only takes 1 clock cycle, and the first CPU is running at 3.4 GHz, and the second is running at 2.1 GHz, you want to buy the second CPU if that is the calculation you care about doing the most.

OMG, Jon Rubinstein in that video...

And yes, obviously, I took it for granted that it was the same CPU, that Cache, memory bandwidth, I/O, ringbus/hypertransport etc. etc. didn't play a role. I was just trying to make a point.

AMD tends to set architectural trends...Intel just executes better.

Ya, that just about sums up the past 10 years. Short pipeline, multicore, 64bit, IMC, APU were all pretty much AMD ideas. At some point though, Intel started copying AMDs press releases instead of their shipped CPUs, and they managed to out-execute them with their own ideas.

 

[Phynaz]

Bulldozer does not compete with Sandy Bridge-E, but rather Sandy Bridge. Bulldozer is a Performance CPU and platform, just like Sandy Bridge. Sandy Bridge-E is an Enthusiast CPU and platform.

AMD :
"AMD’s FX brand will enable an over-the-top experience for PC enthusiasts," said Leslie Sobon, vice president of worldwide product marketing, AMD. "By combining an unlocked, native eight-core processor, the latest in chipset technology, and AMD’s latest graphics cards, FX customers will enjoy an unrivalled feature set and amazing control over their PC's performance."

Yeah, I know it's marketing, but just sayin'...

 

[Topweasel]

You are sure point to point with HT . I rather doubt it . It shares with DEC is more likely. As Dirk came from dec. Point to point is older than I am.

No point to point. The Technology and design of QPI vs HT. Considering Intel had been using GTL since the pentium (which was a technology licensed to them). Its not hard to believe that they used technology that was freely available to them to build their first new bus from the "ground up" in the last 25 years.

Your 3Dnow was a failure To suddenly say it share bites with sse is a red harring . Fact is intel introduced SSE.

Dodging the point AMD developed an instruction set similiar to mmx for multimedia and other applications. This was 3dnow, and intel when they designed a similiar instructionset, used all of the instructions that AMD developed for 3dnow (which the cross licensing allowed them to do) and added more. This was SSE.

Intel already had 64 bit tech on itanic . A future chip such as Haswell will have more in commom with Itanic than AMD64 . VLIW is the future and that is EPIC . Haswell will combine features from Intels complete IP. Intel had to use AMD 64 they were between a rock and a hard place. AVX is proof of the move towards IA64. Scatter gather is a feature on larrabee that will also be on haswell. The memory controller on die . Who really cares Intel proved its point on C2D thats the biggest point of all. Intel owes more to Rambus tech than to anyone on the memory controller than any other company as intel licensed their tech . Than we have the Prefix of vec an intel exclusive which really cripples FMA4.

We will see how this all turns out, but if a CPU uses X86-64 which in Intel's case they call it EMT64, then if AMD dies they can no longer sell those chips.

Your only solid point is AMD64 which by the time haswell arrives will be a none issue as intel will likely be using wholelly its IA64 IP. EPIC= VLIW that is IA64. AMD 64 is a dead end.

Than the 1 oint that stand above all else in debate points . AMD can not sell X86 tch . Only intel can . Why because Intel owns X86.

Pure nonsense. In an environment where AMD no longer exists. Intel would not have access to the IP that they have received from AMD. If they no longer had access to that IP, then even though its built on previous Intel IP, they can no longer use it. This means that Intel would have to cease production of products with AMD IP in it. I am not even positive that this wouldn't apply to some portions of their IA-64 tech.

 

[Nemesis 1]

AS all ready stated nonsense , Show me that In the Agreement , You can't because that part was sealed from public viewing . Wasn't that long ago that intel wanted to make the whole agreement public knowledge. AMD wouldn't do . What is it AMD doesn't WANT YOU TO SEE? Yet Intel wants you to see . Intel being the inventor of X86 would never enter into an agreement were they would lose IP not ever. AMD won the right to COPY intels x86. You think Intel would give up IP if AMD closed its doors . Thats just plain crazy to think intel would do such a thing at a time they wanted AMD dead. Intel AMD reached agreement outside of court. Under the terms you sugjest . Intel would have let a judge make the rules in court.

 

[Topweasel]

AS all ready stated nonsense , Show me that In the Agreement , You can't because that part was sealed from public viewing . Wasn't that long ago that intel wanted to make the whole agreement public knowledge. AMD wouldn't do . What is it AMD doesn't WANT YOU TO SEE? Yet Intel wants you to see . Intel being the inventor of X86 would never enter into an agreement were they would lose IP not ever.

They are not losing IP, they are sharing IP with another company. IP borrowed from AMD isn't Intel to keep and its one of the reasons why they made concessions with AMD with the most recent agreement.

Intel only wanted to show the agreement because they felt that AMD was breaking their portion of the Agreement with the spin off of GloFo, and didn't want people think they were just being mean. But its the reason why they rewrote the agreement to allow the move, its why they since they are using more AMD tech then ever they let AMD pay less in royalties for the base X86 contract, and why AMD accepted a nominal one time payment for calling off the hounds.

Everyone knows that the two share technology, everyone knows that the cross licensing agreement allows them to. You might be able to debate which ones Intel is using that are sourced from AMD ip, or the other way around (and you are not doing a great job in doing so). The specifics are redacted true enough, but that doesn't mean it doesn't exist and that understood facts are not really facts, just because you don't have the confidential version of the document.

 

[Nemesis 1]

The name of the company slips my mind but intel got a license to use its IP . The company emulated x86 . NV has that IP also they I believe bought it. Yet in In the recent agreement between Intel NV . NV agreeded not to emulate x86 that they own the IP for. Whos to say haswell in the software layer isn't emulating X86 . Intel is one company that could pull this off without losing performance because of its large cache.
Than intel haswell wouldn't be carring all that legacy crap in their hardware, Making for a lean mean performance monster. If I was Intel this is what I would do . When Intel bought elbrus that pretty much made the company that sold there IP to NV and licensed to Intel that same IP for 25 million . The reason that companies processor sucked is the small cache. with a large cache they could have succeeded with their VLIW processor emulating x86

Me and IDC had a good discussion on this a while back and all the info I discussing here is in that thread including what elbrus brought to the table for a emulated X86 cpu . Its good stuff and really brings all of intels present research into the realm of reality as discussed in that Thread . That software layer I was talking about is likely emulated x86 . This could also be why prefix of Vex is an intel exclusive .

.

 

[Topweasel]

"Patents" shall mean all classes or types of patents other than
design patents (including, without limitation, originals, divisions,
continuations, continuations-in-part, extensions or reissues), and
applications for these classes or types of patent rights in all
countries of the world (collectively "Patent Rights") that, at any
time during the term of this Agreement, are owned or controlled by
the applicable party or any of its Subsidiaries or to which such
entities have the right to grant licenses, that have a first
effective filing date during the Capture Period and to the extent
that the applicable party or its Subsidiaries has the right to grant
licenses within and of the scope set forth herein and without the
requirement to pay consideration to any third party (other than
employees of the applicable party or its Subsidiaries) for the grant
of a license under this Agreement.

This straight from the redacted document from the 2001 agreement. Again there are specific portions of the agreement we don't see, but if you look at this its clear that the patents are still held by their respective parties, and later you see that agreement basically says Intel and AMD is granted with their own sections the equipment for the others. It actually says that if Intel wanted to create (like TSMC) chips for AMD they could and vise versa and the agreement of situations where the agreement dissolves. No where does it and its not going to say in the confidential version that all AMD patents revert to Intel if the agreement is ever dissolved.

http://contracts.corporate.findlaw.com/operations/ip/802.html

 

[Nemesis 1]

Is what I see is lawyer jibberish . That fact that it says a party can sell that should tell you this or license should have told you something as intel is the only party that can do this . FACT!

 

[Topweasel]

The name of the company slips my mind but intel got a license to use its IP . The company emulated x86 . NV has that IP also they I believe bought it. Yet in In the recent agreement between Intel NV . NV agreeded not to emulate x86 that they own the IP for. Whos to say haswell in the software layer isn't emulating X86 . Intel is one company that could pull this off without losing performance because of its large cache.
Than intel haswell wouldn't be carring all thar legacy crap in their hardware, Making for a lean mean performance monster. If I was Intel this is what I would do . When Intel boufgt elbrus that pretty much made the company that sold there IP to NV and licensed to Intel that same IP for 25 million . The reason that companies processor sucked is the small cache. with a large cache they could have succeeded with their VLIW processor .

Me and IDC had a good discussion on this a while back and all the info I discussing here is in that thread including what elbrus brought to the table for a emulated X86 cpu . Its good stuff and really brings all of intels present research into the realm of reality as discussed in that Thread . That software layer I was talking about is likely emulated x86 . This could also be why prefix of Vex is an intel exclusive .

.

The company was Transmeta and it worked both ways. To emulate X86, you have to program in the X86 functions, which means depending on what is included in emulation (SSE for example) would still require an agreement with AMD. If it doesn't emulate SSE then it isn't going to hold a candle to the real thing. As for that Both AMD and Intel both signed cross licensing agreements (only way it could get done) with Transmeta (one that was really restrictive for Transmeta on both accounts). This allowed Transmeta to produce chips, and AMD and Intel have used several of its patents to lower power usage in their CPU's.

 

[Topweasel]

Is what I see is lawyer jibberish . That fact that it says a party can sell that should tell you this or license should have told you something as intel is the only party that can do this . FACT!

Did you read the link at all and see what they actually referred to as party and what type of topics and wording was used.

Fact is that while Intel is the reigning master of all that is X86, they don't own all of it.

 

[Nemesis 1]

The company was Transmeta and it worked both ways. To emulate X86, you have to program in the X86 functions, which means depending on what is included in emulation (SSE for example) would still require an agreement with AMD. If it doesn't emulate SSE then it isn't going to hold a candle to the real thing. As for that Both AMD and Intel both signed cross licensing agreements (only way it could get done) with Transmeta (one that was really restrictive for Transmeta on both accounts). This allowed Transmeta to produce chips, and AMD and Intel have used several of its patents to lower power usage in their CPU's.

Thats nonsense. Intel doesn't need to get any permission from AMD to use SSE emulated. Not that I ever said SSE would be emulated. With AVX doing the recompile from old outdated code to a more friendly code is good for all of us . A believe Prefix of Vex does all SSE2 recompiles automaticly . Once the code is recompiled Intel can shed the legacy code. Than the remaining code that won't fit into the AVX prefix of Vex.Scheme can be emulated (morphed). Its pretty clear this is were intel is going all the info we have points in that direction . Right now we have nights ferry in developer hands working with vex (LRBni)and that software layer .


Transmeta is the company I was referring to . They used VLIW cores . They never got or had to get a license for x86 ever. Hence the NV intel agreement not to emulate x86. There is one part in this whole debate thats left untouched Intel wanted to get away from X86 Itanic is enought proof for this . AMD 64 succeeded in stopping intels plan and kept us in the darkages. Intel has found a way out threw a software layer that is under no agreement between AMD and Intel by the courts or other wise. I suspect haswell will be a VLIW cores running emulated x86 . Thus Intel sheds the monkey on its back once and for all. What is AVX how does it run sse or how does the compilers recode for it . AVX tells us much . Intel is moving towards IA64 and Away from x86 64.

 

[Nemesis 1]

Did you read the link at all and see what they actually referred to as party and what type of topics and wording was used.

Fact is that while Intel is the reigning master of all that is X86, they don't own all of it.

I read it and its as I said lawyer jibberish / Without the sealed parts that part of the agreement means only what YOU want it to mean . We know that AMD can't license or sell X86 and thats fact.

The monkey on intels back . AVX and FMA4 are perfect examples . AMD orginally was going SSE5 with FMA3 . Than they THE monkey on intels back. Decided to change to FMA 4 and use AVX(VEX) . After AMD was far enough along on development Intel changed its mind and Decided to do AVX , But didn't have time to add FMA3. Haswell Adds FMA3 and other intel IP and sheds the monkey on its back once and for all . Than the Great innovative company AMD can show all what it can innovate.

Intel spends alot on research and development . With larrabee Intel scraped the release. I found this interesting and disappointing . But there are features in Larrabee that did confuse me alot . The biggest being Why would intel put (LRBni) into an x86 and than have AMD use this instruction set. It could be intel decided the same thing and decided not to use X86 just to keep AMD from having (LRBni). This actually makes sense. Haswell comes out as a VLIW core. Itanic EPIC(VLIW) intel have NO agreements inplace on Itanic none. So Haswell being VLIW cores using (LRBni) blocks AMD from using it. Than intel runs a software layer on Haswell that emulates all the remaining legacy code that Prefix of Vex code cann't recode in the compilers for (LRBni)instruction set . AVX instruction set and (LRBni) both work on vectors. Intel was willing to give up AVX to AMD but not Prefex of Vex code . (LRBni) will likely tie those instruction set to gether in a VLIW cpu using a software layer to run legacy code intels Prefex of Vex instruction set wouldn't work with .

 

[Nemesis 1]

If you really want to see what I am talking about sign in here . I didn't sign in to check the content but it should take you to the blog I was referring to . The blogger was off a few generations but he is looking pretty smart at this time .

https://www.google.com/accounts/Ser...r_archive.html&zx=1r9hq1o2g6yl3&ltmpl=private

If that blog doesn't come up THE inquirer reported on it long ago . Charlie still worked there. I have it copyed on our research computer but I don't want to pull it from there.

 

[Nemesis 1]

I pulled part of that blog .




However, there was one company which took a more radical approach and while its processor wasn’t exactly blazing fast it was faster than those using the stripped back approach, what’s more it didn’t include the x86 instruction decoder. That company was Transmeta and its line of processors weren’t x86 at all, they were VLIW (Very Long Instruction Word) processors which used "code morphing" software to translate the x86 instructions into their own VLIW instruction set.

Transmeta, however, made mistakes. During execution, its code morphing software would have to keep jumping in to translate the x86 instructions into their VLIW instruction set. The translation code had to be loaded into the CPU from memory and this took up considerable processor time lowering the CPU’s potential performance. It could have solved this with additional cache or even a second core but keeping costs down was evidently more important. The important thing is Transmeta proved it could be done, the technique just needs perfecting.

Intel on the other hand can and do build multicore processors and have no hesitation in throwing on huge dollops of cache. The Itanium line, also VLIW, includes processors with a whopping 9MB of cache. Intel can solve the performance problems Transmeta had because this new processor is designed to have multiple cores and while it may not have 9MB it certainly will have several megabytes of cache.

Most interestingly though is the E2K compiler technology which allows it to run X86 software. This is exactly the sort of technology Intel need and since last year they have had access to it and employ many of it’s designers.

You can of course expect all these cores to support 64 bit processing and SSE3, you can also expect there to be lots of them. Intel’s current Dothan cores are already tiny but VLIW cores without out of order execution or the large, complex, x86 decoders leave a very small, very low power core. Intel will be able to make processors stuffed to the gills with cores like this.

Intel will now be free to do as it pleases with X86 decoding done in software Intel can change the hardware at will. If the processor is weak in a specific area the next generation can be modified without worrying about backwards compatibility. Apart from the speedup nobody will notice the difference. It could even use different types of cores on the same chip for different types of problems.

The New Architecture
To reduce power you need to reduce the number of transistors, especially ones which don’t provide a large performance boost. Switching to VLIW means they can immediately cut out the hefty X86 decoders.

Out of order hardware will go with it as they are huge, consumes masses of power and in VLIW designs are completely unnecessary. The branch predictors may also go on a diet or even get removed completely as the Elbrus compiler can handle even complex branches.

 

[LOL_Wut_Axel]

AMD :
"AMD’s FX brand will enable an over-the-top experience for PC enthusiasts," said Leslie Sobon, vice president of worldwide product marketing, AMD. "By combining an unlocked, native eight-core processor, the latest in chipset technology, and AMD’s latest graphics cards, FX customers will enjoy an unrivalled feature set and amazing control over their PC's performance."

Yeah, I know it's marketing, but just sayin'...

You probably don't really know how this works, but I'll break it down to you. These marketing words have nothing to do with the roadmap words. Performance and Enthusiast CPUs (as per the roadmap) are both for enthusiasts, with Enthusiast obviously being a tier higher. AMD does not have plans to release an Enthusiast CPU, so that leaves Intel alone with Sandy Bridge-E.

 

[Idontcare]

Me and IDC had a good discussion on this a while back and all the info I discussing here is in that thread including what elbrus brought to the table for a emulated X86 cpu . Its good stuff and really brings all of intels present research into the realm of reality as discussed in that Thread . That software layer I was talking about is likely emulated x86 . This could also be why prefix of Vex is an intel exclusive .

They took 10yrs to bring finfet to fruition. Who knows what they are cooking up with the Elbrus tech.

 

[Edrick]

You probably don't really know how this works, but I'll break it down to you. These marketing words have nothing to do with the roadmap words. Performance and Enthusiast CPUs (as per the roadmap) are both for enthusiasts, with Enthusiast obviously being a tier higher. AMD does not have plans to release an Enthusiast CPU, so that leaves Intel alone with Sandy Bridge-E.

Yea, AMD has their 8 core CPU targeted to the "mainsteam" while Intel has their 4/6 core CPUs (SB-E) targeted at Enthusiasts. Thanks for letting us know how that works. You must work for for AMD.

End Sarcasm

 

[Nemesis 1]

Well I haven't seen a finfet design yet . I have heard that intel is bringing a new 3D tri-gate tech in 22nm . Most here seen it in operation on 3 differant platiform . I would imagin that Intels has the cpus in the wild being debugged but these guys are all under NDA.

 

[Nemesis 1]

Yea, AMD has their 8 core CPU targeted to the "mainsteam" while Intel has their 4/6 core CPUs (SB-E) targeted at Enthusiasts. Thanks for letting us know how that works. You must work for for AMD.

Not that its important but how did you come to that conclusion with what he said?

 

[Nemesis 1]

They are not losing IP, they are sharing IP with another company. IP borrowed from AMD isn't Intel to keep and its one of the reasons why they made concessions with AMD with the most recent agreement.

Intel only wanted to show the agreement because they felt that AMD was breaking their portion of the Agreement with the spin off of GloFo, and didn't want people think they were just being mean. But its the reason why they rewrote the agreement to allow the move, its why they pay less in royalties for the base X86 contract, and why AMD accepted a nominal one time payment for calling off the hounds.

Everyone knows that the two share technology, everyone knows that the cross licensing agreement allows them to. You might be able to debate which ones Intel is using that are sourced from AMD ip, or the other way around (and you are not doing a great job in doing so). The specifics are redacted true enough, but that doesn't mean it doesn't exist and that understood facts are not really facts, just because you don't have the confidential version of the document.

Other than AMD64 what tech is Intel using . your words .since they are using more AMD tech then ever they let AMD .

Man your so far out there its connotation. The word snake means a crawling reptile but it usually connotes sneakness and meanness. TOPWEASEL

 

[CPUarchitect]

What I'm thinking Haswell will be is: 4-8 "next gen" CPU cores + a cluster of Larrabee-like cores as a sort of FPU acceleration hardware. It'll all be general purpose, unlike the current IGP stuff...

That makes no sense at all. Various research papers have pointed out that a 32-core Larrabee is actually only a few times faster than a 4-core CPU using only SSE.

AVX with FMA increases the theoretical throughput by fourfold. So having Larrabee cores next to such powerful and flexible CPU cores would be silly. Developers would also still have to code for significantly different architectures (and various configurations), but gain very little from it.

It would be a lot more valuable to converge AVX toward LRBni. The major feature that is still lacking is gather/scatter support, but it's quite feasible to add. Another advantage of the Larrabee architecture is that the in-order cores are more power efficient. However, this can also be achieved with AVX by executing 1024-bit instructions on 256-bit execution units, in four cycles. This decreases the instruction density (and thus all of the overhead associated with it), and even helps cover cache miss latencies! :awe:

Aside from retaining the performance advantage of out-of-order execution for legacy and serial workloads (great for combating Amdahl's Law), this would also keep the thread count reasonable (resulting in low synchronization overhead). A homogeneous architecture also allows optimally using the entire chip with just one software design. Instead of having multiple configurations (a varying number of CPU and LRB cores, and perhaps an integrated or discrete GPU), and all the complication and inefficiency this brings, it could eventually all be unified into one architecture which can handle any task (and enable a whole range of applications which are unthinkable with a heterogeneous architecture). With software development and maintenance getting ever more complex, lots of developers embrace this idea of a simplified architecture, and after all its them who create the applications we run.

It's pretty clear that Intel has long-term plans with AVX. It's an entirely new encoding scheme, focused completely on parallel instructions, with FMA instructions already specified and reserving bits specifically to extend it to 1024-bit. While I don't think 1024-bit or even 512-bit execution units are realistic any time soon (note that most architectures have two SIMD pipelines per core), Intel has processed wide vectors on narrow execution units before so it seems likely they want to go that route again...

 

[Phynaz]

You probably don't really know how this works, but I'll break it down to you.

I've been in IT for over 25 years.

I know how it works, thanks.

 

[Cerb]

The New Architecture
To reduce power you need to reduce the number of transistors, especially ones which don’t provide a large performance boost. Switching to VLIW means they can immediately cut out the hefty X86 decoders.

Out of order hardware will go with it as they are huge, consumes masses of power and in VLIW designs are completely unnecessary. The branch predictors may also go on a diet or even get removed completely as the Elbrus compiler can handle even complex branches.

I'll take JIT x86 all day long. The rest, though, I don't know...too much pie in the sky, I think.

Some code loves good OoOE, regardless of ISA or anything else, having small bunches of parallel instructions, and you can't get much better than scoreboarding w/o doing real OoOE. Yeah, it's big, but it works wonders.

Branching problems (numerous computed branches in a short time span) I can see being handled with the front-end ISA and compiler, but I don't see how you could reconcile it with x86 as input. Branch prediction and prefetching could go software (SW branch prediction can even help w/ HW that does a good job in HW), though I would wonder about the efficiency, v. adding programability to dedicated units.

 

[Nemesis 1]

That was from a blog in 2005 pretty old stuff. The point is intel has all the IP . What haswell turns out to be is anyones guess. but intel can go to a VLIW core and get AMD off its back once and for all . Will intel do this who knows . THan AMD would be alone with X86 making them a monopoly I guess there is one other x86er out there.

 

[Topweasel]

Other than AMD64 what tech is Intel using . your words .since they are using more AMD tech then ever they let AMD .

Man your so far out there its connotation. The word snake means a crawling reptile but it usually connotes sneakness and meanness. TOPWEASEL

I really don't understand what you are saying. Not trying to be mean, maybe there is a language translation issue here. I am going to answer your question as best I can since you seemed to end it in middle of a sentence.

Right off the bad EMT64 and SSE are built off of or exact copies of AMD technology. Chances are that AMD owns some of the IP in regards to tech used in QPI, IMC, and multiple core integration. But those two alone count for almost every Intel x86 CPU made in the last 10 years. That's over a billion CPU's. But I am not a CPU designer I don't work for AMD or Intel so I can read off a checkbox for it. But you go back to before 1998, and any technology Intel was using wasn't from AMD. (Though the original Pentium up to an including the Core 2 Quad, used GTL which was licensed from another company). In 10 years from 0 to now over 1 billion CPU's using AMD technologies.

I really don't understand why you are comparing me to a snake and calling me mean and sneaky. The information I am giving you is understood throughout the PC industry.