Meh, it's just a Raven Ridge clock bump. Hardly exciting....to me
Meh, it's just a Raven Ridge clock bump. Hardly exciting.
I don't think so: I presume that Picasso will share similarities with Matisse (Ryzen 3xxx series) in similar fashion to Raven Ridge which have more common with Pinnacle Ridge rather than Summit Ridge.
OK why wouldn't AMD have next years Picasso APU on 7nm process? That makes more sense to me then 12nm.Raven ridge with pinnacle ridge goodies (IMC, faster L3 cache, and xfr2) are welcome changes... But i hope there is more...
Vega igp on 12nm will be interesting
OK why wouldn't AMD have next years Picasso APU on 7nm process? That makes more sense to me then 12nm.
Ah I see now. Thanks for explaining.A new tapeout including all the masking layers is VERY expensive.
It can make sense to milk the current masks for all they can, especially since the ASP on RR is not that great, since it is considered a budget part.
A 12nm APU, would just be Raven ridge with the same process refinements that Ryzen got, which means exactly the same RR die, just with a bit more clock speed. But it would have none of the costs of a new tapeout. So huge cost saving for AMD.
I don't think Picasso will be based on Raven Ridge much.
It literally says "Raven Ridge architecture" on the slide.
It literally says "Raven Ridge architecture" on the slide.
For that slide, the uplift isn't comparable to that of Pinnacle Ridge.It literally says "Raven Ridge architecture" on the slide.
What do you mean by oops version/B revision?For that slide, the uplift isn't comparable to that of Pinnacle Ridge.
-> PR: Performance Uplift
-> PC: Power/Performance Uplift.
The Raven Ridge that launched was the oops version/B revision. So, Picasso could actually be much closer to the original Raven Ridge concept. The APU side doesn't always follow the CPU side @ AMD. So with Picasso, it starts to diverge into its niche of optimizations.
There is also Picasso launching on top of River Hawk(10W-35W) 7-nm vs Horned Owl(15W-65W) 14-nm. So, Picasso to achieve the same amount of capabilities requires much more extensive changes. Hence, why Picasso != Raven Ridge.
The original version of Raven Ridge is Quad-core w/ 8 MB L3 cache and a 12 CU iGPU. There is also the Raven Ridge A2 which had a 16 CU iGPU with a single HBM stack. We should only focus on the A1, and not on the A2. The yields and performance between CPU and GPU with the 8 MB L3 and 12 CUs weren't good. So, AMD re-taped out Raven Ridge without those deterrents, hence the Raven Ridge delay.What do you mean by oops version/B revision?
Doesn't seem very plausible. If the yields were poor they'd just cut down the parts, very much like they do now on mobile. At AMD's volumes that is more financially sound than creating new masks.The original version of Raven Ridge is Quad-core w/ 8 MB L3 cache and a 12 CU iGPU. There is also the Raven Ridge A2 which had a 16 CU iGPU with a single HBM stack. We should only focus on the A1, and not on the A2. The yields and performance between CPU and GPU with the 8 MB L3 and 12 CUs weren't good. So, AMD re-taped out Raven Ridge without those deterrents, hence the Raven Ridge delay.
AMD releases RRA1. It is found out best SKUs are salvaged parts. Media does _____ , consumers expect _____ to be down. Somethings are best not released, like the 6-core GDDR5 Hi-End 2014 APU. 4 MB L2 and 2 CUs on RRA1, I'm pretty sure the iGPU would have actually cutted a complete array. So, even less would be in the 2700u part. So, instead of 11 CU to 10 CU, it would be 12 CU to 8/9 CUs. So, it was in AMD's best interest to keep up their REP.Doesn't seem very plausible. If the yields were poor they'd just cut down the parts, very much like they do now on mobile. At AMD's volumes that is more financially sound than creating new masks.
Fixed. That is obviously just your opinion.
We don't know what it is. And even if it is a clock speed bump with absolutely no other improvements i think it would still be a nice improvement given that Raven Ridge is already the best mobile x86 processor available. However it is highly unlikely that it will only be a clock speed bump without any other tweaks to increase efficiency and performance.
A new tapeout including all the masking layers is VERY expensive.
It can make sense to milk the current masks for all they can, especially since the ASP on RR is not that great, since it is considered a budget part.
A 12nm APU, would just be Raven ridge with the same process refinements that Ryzen got, which means exactly the same RR die, just with a bit more clock speed. But it would have none of the costs of a new tapeout. So huge cost saving for AMD.
I dont believe they can use the same masks from 14nm to 12nm.
Aren't the same masks. Way too many changes on the process front to just copy paste the masks. The fin shape changed, the eSiGe trenches are buried deeper, etc'Isn't that what they did from Summit Ridge to Pinnacle Ridge? Same masks, some transistor performance improvements, and some microcode improvements to fix XFR.
Isn't that what they did from Summit Ridge to Pinnacle Ridge? Same masks, some transistor performance improvements, and some microcode improvements to fix XFR.