NostaSeronx
Diamond Member
- Sep 18, 2011
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So, Tremont in Mercury Lake. It is also a very olde thing..
March 2016: (Before it was edited out of existence)
Testing against the future Intel Atom platforms, codenamed Goldmont and Tremont, the VP9 optimizations delivered additional gains.
Goldmont -> Goldmont Plus (Old Tremont) -> Tremont (New Tremont)
https://en.wikichip.org/wiki/intel/microarchitectures/tremont
https://www.phoronix.com/scan.php?page=news_item&px=Intel-Tremont-ISA
//Tremont might skip over VEX.AVX for a limited EVEX.AVX implementation. SSE4.2(xmm0-xmm15) to EVEX.AVX(xmm0-xmm31), only xmm is supported. VEX wouldn't see any improvement on Atom, but EVEX would because more registers, etc.
March 2016: (Before it was edited out of existence)
Testing against the future Intel Atom platforms, codenamed Goldmont and Tremont, the VP9 optimizations delivered additional gains.
Goldmont -> Goldmont Plus (Old Tremont) -> Tremont (New Tremont)
https://en.wikichip.org/wiki/intel/microarchitectures/tremont
https://www.phoronix.com/scan.php?page=news_item&px=Intel-Tremont-ISA
//Tremont might skip over VEX.AVX for a limited EVEX.AVX implementation. SSE4.2(xmm0-xmm15) to EVEX.AVX(xmm0-xmm31), only xmm is supported. VEX wouldn't see any improvement on Atom, but EVEX would because more registers, etc.
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