Solved! Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[DrMrLordX]

Give me a break.

Computex is the end of May, around 5 weeks before H2.

That's over a month later . . . if that's what you meant, you really should have said so. And July still seems optimistic for a launch labeled "H2".

 

[eek2121]

"a few weeks" can mean any number of weeks.

few
/fyo͞o/

determiner · adjective

1. 1.
   a small number of.
   "may I ask a few questions?"

 

[Justinus]

"a few weeks" can mean any number of weeks.

few
/fyo͞o/

determiner · adjective

1. 1.
   a small number of.
   "may I ask a few questions?"

Is 5+ a "small number"? It seems the definition of small is the problem here. In my experience, colloquially, a "few" means 3, 4, and sometimes 5. 5-6+ is several.

 

[DrMrLordX]

"a few weeks" can mean any number of weeks.

If you say so mang.

 

[deasd]

2022 H2 + a few weeks after Computex = 2022 July 1st to mid August.

 

[biostud]

If they are making a 5800x3d, it stands to reason that there's no logistical or technical reason that they couldn't make a 5950x3d. If we suppose that the limitations are around AMD choosing to pretest the Zen3 die to verify that all 8 cores are suitable for use, then both of those SKUs would be appropriate. If we suppose that there is a slight power hit for the L3 stacked die, then it stands to reason that they could produce a 5950x3d that has a slightly reduced max boost turbo and still hit power targets. The only stopping point that I can see is that AMD believes that they can't command a high enough price to make it worth it. With it being the likely best CPU ever released for a platform that has millions of installed motherboards that can support it, I can't see that being the case either. I believe that there will be a 5950x3d at some point. It makes too much sense.

With zen4 launching later this year and possibly a limited supply of 3D cache chiplets, I think AMD simply has prioritized the fastest gaming CPU and Threadripper/Epyc market. They really don't need to launch either a 5900x3D er 5950x3D to keep being relevant in their market segment.

 

[nicalandia]

Lisa says, "All those Zen4 cores are running at 5GHz" during a halo infinite demo.

Good to know there is no frequency regression.

"AMD demoed a Ryzen 7000 ‘Raphael’ chip running Halo Infinite with all cores surpassing 5.0 GHz during the benchmark"

On an Early ES CPU? That's insane and the level of performance will be out of this world

 

[igor_kavinski]

"AMD demoed a Ryzen 7000 ‘Raphael’ chip running Halo Infinite with all cores surpassing 5.0 GHz during the benchmark"

On an Early ES CPU? That's insane and the level of performance will be out of this world

Makes me wish AMD had an "Early Access" program for CPUs.

 

[Justinus]

Makes me wish AMD had an "Early Access" program for CPUs.

They most certainly do and we're not invited. I would jump at the opportunity, given I need to fully upgrade a real work machine that needs to be stable (with the 5950x setup) and I can have a new, in-test machine for everything else.

 

[igor_kavinski]

They most certainly do and we're not invited.

Only for their industry partners and that's with an NDA. Not regular people like us.

 

[xilli_fiberbit]

Real or not shot of RPH, for this spring summer (?):

https://twitter.com/i/web/status/1478402123381489664

 

[eek2121]

"AMD demoed a Ryzen 7000 ‘Raphael’ chip running Halo Infinite with all cores surpassing 5.0 GHz during the benchmark"

On an Early ES CPU? That's insane and the level of performance will be out of this world

One thought I had, they demoed this for Halo Infinite, which actually doesn't mean much. Halo Infinite is not exactly demanding on the CPU.

 

[Mopetar]

Also remember that separate L3 cash has twice the density for some reason. (64MB on 32MB ZEN3)

I wouldn't think the density is really any different. The extra layer of cache just has more space to occupy so it's spread out over a larger area than the cache on the base die.

Lets see what they have to say on their "flawless roadmap execution", I hope someone from the media ask them that question.

Why waste a question when you already know the answer. It's the same answer you'd get from any company right now. Global pandemic and surrounding issues. It's a bit of a non-answer and who knows do what degree it's true, but what else would you expect?

If they launch in July then it's ~20 months since Zen 3. No one is going to care unless they're only shipping a small number of parts just before the end of the year. And really that's just consumers. If the bulk of Zen 4 is going to high-margin markets instead of desktop CPUs the investors aren't going to shed any tears.

 

[Hitman928]

I wouldn't think the density is really any different. The extra layer of cache just has more space to occupy so it's spread out over a larger area than the cache on the base die.

No, the extra layer of cache is almost the same size as the L3 cache in the base layer. AMD said they are using different process options (or maybe cell library, or both, don't remember for sure) to get drastically increased cache density on the extra layer.

 

[dnavas]

If they launch in July then it's ~20 months since Zen 3.

If it helps, the TR grumble-bunnies would like to remind the IWanna-AM5 contingent that the Zen2 3970X was released more than 2 years ago.

 

[Mopetar]

No, the extra layer of cache is almost the same size as the L3 cache in the base layer. AMD said they are using different process options (or maybe cell library, or both, don't remember for sure) to get drastically increased cache density on the extra layer.

What's the catch then? SRAM doesn't shrink well as is, so either AMD had something that wasn't very good for their initial design, or it's not quite as simple as presented. You normally don't even get twice the density from a new node these days, so it seems a bit too good to be true.

 

[jamescox]

The "idiots" are also customers.

Marketing as an "HEDT" chip and assuming only people who max out 100+ threads you'll lose a lot of potential customers.

Again, you consider 20 cores + HT to be "small" amount of threads? What about 30? 40?

You want a chip that's the fastest in all scenarios and that's what will happen.

We all know Intel is totally sucking in servers now. That's not the point.

Okay, I still don’t believe that Intel will be particularly competitive in HEDT in the near future. If you are buying a chip with more than about 10 cores, then I hope you are doing something other than gaming to justify it. Yes, those idiots are customers, but they are also a super tiny niche. AMD almost didn’t offer a HEDT product at all, so AMD isn’t going to expend too much energy chasing such idiots. They may still get them on the strength of their rebadged server parts though.

I also don’t believe that intel will win this fight based on low core count boost clocks. The number of applications where intel boost clocks will win vs. AMD boost clocks, in the context of you are already buying an high core count HEDT processor for something other than gaming, is super tiny.

 

[IntelUser2000]

I also don’t believe that intel will win this fight based on low core count boost clocks. The number of applications where intel boost clocks will win vs. AMD boost clocks, in the context of you are already buying an high core count HEDT processor for something other than gaming, is super tiny.

Not saying low core count MHz is only thing it matters. But that a 56 core SPR-X will win in all areas. Yes it'll use more power, but we all know that. 450W RTX 3090 Ti, 600W Turin, 1KW+ accelerators, etc, etc.

 

[jamescox]

The workstation market (read: TR Pro) is somewhere in between. They want cores but they want frequency/per core performance too.

Depends on the application. For my workloads more cores the better. Boost clocks are almost entirely irrelevant. Any low core utilization apps that I run are gpu limited. This will be true more and more as software is optimized for the new baseline of most people having a lot of cpu cores available.

 

[Hitman928]

What's the catch then? SRAM doesn't shrink well as is, so either AMD had something that wasn't very good for their initial design, or it's not quite as simple as presented. You normally don't even get twice the density from a new node these days, so it seems a bit too good to be true.

The catch is that you can only get this cache density increase on a die where the process and library are specifically good/optimized for caches. This works for AMD since the cache layer only has cache. You couldn't use the same process/library and build a competitive CPU.

 

[DrMrLordX]

"AMD demoed a Ryzen 7000 ‘Raphael’ chip running Halo Infinite with all cores surpassing 5.0 GHz during the benchmark"

On an Early ES CPU? That's insane and the level of performance will be out of this world

It's not really an "early ES CPU". Zen4 in general is far along enough in development that they can ship QS and early retail silicon to hyperscalars . . . well, right now! Anyway you should not be surprised to see the CPU in good working order today. It is not for technical reasons that the market needs to wait well past April to buy this thing.

 

[amrnuke]

I don't know about you guys but I can't wait to unnecessarily upgrade my entire computer later this year!

 

[Justinus]

I don't know about you guys but I can't wait to unnecessarily upgrade my entire computer later this year!

I was hoping for a 5950X3D announcement so I could unnecessarily upgrade sooner. But now it'll have to wait until Zen 4. I suppose it isn't really unnecessary because the hand me down 5950X goes to my lady's work from home machine, although she doesn't really need 16 cores. The old i7 5960X hand me down she got in 2020 when I upgraded to the 5950x is really showing its age in the software she uses.

I am excited at the prospect of justifying a zen 4 upgrade though, and the 5950x will be so much faster with that single core boost and large cache she'll be thrilled.

I guess long story short - I am too. Absolutely.

 

[Hulk]

How much will the V-cache offset DDR5 gains?

What I mean is how much performance boost will we see in moving to V-cache with current DDR4 for memory bound applications?

How much without V-cache but with DDR5?

How much with V-cache and then adding DDR5?

 

[itsmydamnation]

How much will the V-cache offset DDR5 gains?

What I mean is how much performance boost will we see in moving to V-cache with current DDR4 for memory bound applications?

How much without V-cache but with DDR5?

How much with V-cache and then adding DDR5?

I will say near 0 , ddr5 isn't any faster in access time , it allows more concurrency and more data throughput.

But a higher performing core will put more stress on the memory system anyway.