Seconded. It's freaking
The wait is killing me, because depending on how good Zen 3 is, I might do a full upgrade. If Zen 3 isn't very impressive, I might as well just wait for Golden Cove next year.
Seconded. It's freaking
The wait is killing me, because depending on how good Zen 3 is, I might do a full upgrade. If Zen 3 isn't very impressive, I might as well just wait for Golden Cove next year.
Thunder 57
Platinum Member
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They clearly got that faucet fixed. I think things like TRX80 and more recently Zen 3 will top out at 12 cores. They seed things like this and have found the leaks.
It's going to be like how they launched Zen 2. 12 core will be the highest SKU initially, and then next year, they will release a 16 core SKU.
I can't take it anymore.
I'm wondering if they've hired some hitmen to take care of the leakers, it's too quiet.
amd6502
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Leaks aren't reliable. I'd rather wait for reviews from a trusted source anyway.
Of course they aren't, but they make the build up to the launch much more interesting.
That would seem to imply that full 8 cores functional CCD are in short supply. Might be because of 8 core CCDs going to Epyc though.
amd6502
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amrnuke
Golden Member
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"We have improved tracking of parts and data, and if you leak information, you will be caught, and you will be fired. Ask yourself if internet karma is worth it."
I guarantee even if they said that, someone would think, "You know, I think internet karma is worth the risk."
I guarantee even if they said that, someone would think, "You know, I think internet karma is worth the risk."
Nope, 5nm was v0.5 since mid-2018.
"TSMC’s 5-nm node is still embryonic with a version 0.5 EDA flow targeted for June release and a v0.5 design kit in July."
- https://www.eetasia.com/18050304-tsmc-ready-for-euv-on-7-5nm/
Comment: Which is when AMD starts designing the final chip physically.
<v1.0 TSMC to Partner tapeout = 3 years
v0.1 TSMC to Partner tapeout = 1.5 years>
~~AMD's Custom 5nm~~ => Leading-edge TSMC customers are now engaging at the PDK v0.1 level, providing an opportunity to “more fine tuning” and “improved design-technology optimization insights”, according to David Keller, President of TSMC North America.
N5 v0.9 PDK available in November, 2018
Top 10 Highlights from the TSMC Open Innovation Platform Ecosystem Forum - Semiwiki
Each year, TSMC hosts two major events for customers – the Technology Symposium in the spring, and the Open Innovation Platform Ecosystem Forum in the fall. The Technology Symposium provides updates from TSMC on: (advanced) silicon process development status design enablement and EDA reference...
semiwiki.com
TSMC OIP Ecosystem Forum
<a href="https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes"></a>Last Wednesday was the TSMC OIP Ecosystem Forum. The first part of the day was hosted by Dave Keller, President of TSMC America. He pointed out that it was the 10th anniversary of OIP. It has been a great success...
community.cadence.com
Matisse was sampled at RTG in 2018. So, would have N7+ Vermeer as well. But, it wasn't till 1.5 years after before we saw Vermeer/Milan.
Q2 2018 transcript:
"We have seen the first view of 5-nanometer, and we think 5-nanometer is very competitive as well. So again, our goal is to use the best process technology can offer in the foundry market, and then differentiate on architecture, and product positioning, and those kinds of things."
Which is obviously hinting at test chips from 5nm and intent of 5nm when win and 7nm when fail.
It is reflected in Neoverse as well btw;
Arm Announces Neoverse Infrastructure IP Branding & Future Roadmap
Roadmaps are subject to change:
Stop lying about 64-core EPYCs people, the roadmap said this!
Stop lying about 8-core V2000s people, the roadmap said this!
Have to deal with roadmap zealots, what a year.
It's 7nm+, no wait it is 7nm! Ackchyually, its 5nm. Third change's a charm.
Btw, 1Q17 from TSMC: "Now N5. We have been working with major customers to define 5-nanometer specs and to develop technology to support customers' risk production schedule in second quarter 2019, with volume ramp in 2020. Functional SRAM in our test vehicle has already been established. We plan to use more layers of EUV in N5 as compared to N7+."
7nm+ would have been seen much earlier than now. At least MI100 would have launched last year. Since, MI50/MI60 launched in 2018 => 11/18/2018. In that year, 7nm went HVM.
Just to recap... AMD's 7nm node sampled and shipped within 2018. Same year as Apple's A12.
Apple's A14 has launched and is shipping October in devices. However, AMD is in last year's 7nm+ node, or at worst 2018's 7nm node?! Did AMD get more leveraged? Did AMD lose revenue with a critical flop? If not, why aren't they shipping 5nm this year like they did 7nm in 2018?
We aren't in the era of beggar AMD, we are in the era of monarch AMD.
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Nereus77
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- Dec 30, 2016
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Nosta, the only person saying Zen 3 is 5nm is you. Everything we've seen from AMD says 7nm (N7P). Zen 4 will be 5nm. Zen 5 probably 3nm.
You are making assumptions just based on what Apple is doing, not on what AMD is saying.
You are making assumptions just based on what Apple is doing, not on what AMD is saying.
I am not the only one. People are ignoring Taiwan sources of information. The kind with upper end TSMC sources, but ya lets just ignore AMD's N5 orders.
AMD currently follows Apple's node.
Vega2x, SSP-A0 => N7 in 2018 => Apple A12
Navi1x => N7P in 2019 => Apple A13
Given, that since moving to TSMC they have always been on the same node as Apple.
Apple A14 => N5 in 2020 => ----, ----, ----
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Thunder 57
Platinum Member
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I'm sure AMD has N5 orders, but not for Zen 3.
Other than Navi2x series which are in the XSX, XSS, and PS5. Which are 7nm DUV SoCs.
N5 orders should be full stack: Milan as N5, Trento as N5P, Vermeer as N5 and Vermeer XT as N5P, CDNA1 MI100 N5, CDNA2 MI200 N5P. Cezanne/Rembrandt as N5P. With Navi2x stuck on 7nm, that leads to Navi3x being 5nm and RDNA2 still, hence Navi3x isn't GFX11xx(RDNA3) but GFX105x(RDNA2.5).
7nm+ no wafer starts available w/ 6-track UHD = 57-nm contact poly pitch and 38-nm M1 pitch
5nm 80,000+ wafer starts per month w/ 6-track UHD = 57-nm contact poly pitch and 38-nm M1 pitch.
More or less making Zen4 being the one that is 51-nm contact poly pitch and 34-nm M1 pitch. It also might use the more advanced/aggressive 5-track lib and M0/M2/M3 28-nm pitch.
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Zen 3 is 7nm (N7P), 8 cores per CCX, higher cache per core, faster IF, better IMC, better IPC, a bit higher frequency.
Thats what is known about Zen 3.
Saying Zen 3 is 5nm is contradicting what AMD himself already said about Zen 3, so only someone who ignores what AMD said spreads fake rumours about Zen 3 being 5nm.
We can only ask why someone insists spreading fake rumours about Zen 3 -> 5nm knowing AMD already said is 7nm.
Trying to overhype with fake rumours and then say AMD didn't deliver? Who knows..
Thats what is known about Zen 3.
Saying Zen 3 is 5nm is contradicting what AMD himself already said about Zen 3, so only someone who ignores what AMD said spreads fake rumours about Zen 3 being 5nm.
We can only ask why someone insists spreading fake rumours about Zen 3 -> 5nm knowing AMD already said is 7nm.
Trying to overhype with fake rumours and then say AMD didn't deliver? Who knows..
“himself”? 🤣
Also AMD has not confirmed anything regarding Zen 3 beyond the fact it will be on a 7nm process. N7P is a rumor, as is N7+, etc.
So, you are saying AMD is running behind? AMD are preemptively not delivering?
UNISOC Unveils T7520 SoC for 5G Smartphones: Octa-Core, 6nm EUV
5nm EUV / 2H 2020
AMD won't be on any of these processes till say 2022?
September 12, 2018 => https://www.anandtech.com/show/13350/the-apple-2018-iphone-event-live-blog // A12 N7
November 6th, 2018 => https://www.anandtech.com/show/13561/amd-previews-epyc-rome-processor-up-to-64-zen-2-cores // EPYC N7
2H 2018
July 2019 launch => https://www.anandtech.com/show/14528/amd-announces-radeon-rx-5700-xt-rx-5700-series // N7P stated in 8.4 Radeon RX 5700 Series: The AMD 7nm Energy-Efficient High-Performance GPUs => "With 2nd-generation 7nm technology"
September 2019 launch => https://www.anandtech.com/show/14860/the-apple-2019-iphone-event-live-blog // N7P
2H 2019
They aren't going to go to a node that can get to market 2x faster or have higher yields after-market success?
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DrMrLordX
Lifer
- Apr 27, 2000
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I still don't know why people are saying Zen3 is N7P? It's on N7+
I don't get why people are saying Zen3 is N7P or N7+. It's on 5nm.
Perlmutter was delayed, and it's not because of A100s.
Before the ban, Hi1630 was 7nm+ when it was announced. However, it is now 5nm.
Various 7nm+ stuff.
"7+ is not a major node, but rather it is a technology good for second wave and third wave customers. So it is come up slower when the first wave products or first wave customers ready to convert to the lower -- to another improved version. So it's -- it doesn't conflict with our 5. 5 is another major node."
We are ramping up N7+ right now, but the revenue for this year is still a little bit less than $1 billion. <= TWD
^-- 1Q2019
N7+(2019) => ~34.46M USD
N5(2020) => ~2861.92M USD
"We still expect some using the EUV and some will still stay in the N7. Because for those customer in the N7, in the 2-year cadence, they moved to N5 already. So they have no reason to go back to use N6. However, as I said, for the second wave of the product, they're using N6 with the benefit of lower die cost and better performance."
^-- 3Q2019
N6 has replaced N7+ as a second-wave and third-wave product. Which is proven:
BREAKING | UNISOC Launches New-Gen 5G SoC T7520
Shanghai, China, 26 Feb 2020 – UNISOC, a leading global supplier of mobile communication and IoT chipsets, today officially launched its new-generation 5G SoC mobile platform – T7520. Using cutting-edge process technology, T7520 enables an optimized 5G experience with substantially enhanced AI...
www.unisoc.com
7+ is only blurbed in 1Q20 and 5 is hyped in 2Q20.
=> Moving into third quarter 2020, we expect our business to be supported by strong demand for our industry leading 5-nanometer and 7-nanometer technologies, driven by 5G smartphone, HPC and IoT-related applications.
Then, there is a split => N5 and expect a strong ramp up of N5 in the second half of this year, driven by both 5G smartphones and HPC applications.
Smartphone market and HPC market is N5. Be really weird if someone else is first on 5nm datacenter CPU.
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Thunder 57
Platinum Member
- Aug 19, 2007
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I don't get why people are saying Zen3 is N7P or N7+. It's on 5nm.
Perlmutter was delayed, and it's not because of A100s.
View attachment 30160
Before the ban, Hi1630 was 7nm+ when it was announced. However, it is now 5nm.
Various 7nm+ stuff.
"7+ is not a major node, but rather it is a technology good for second wave and third wave customers. So it is come up slower when the first wave products or first wave customers ready to convert to the lower -- to another improved version. So it's -- it doesn't conflict with our 5. 5 is another major node."
We are ramping up N7+ right now, but the revenue for this year is still a little bit less than $1 billion. <= TWD
^-- 1Q2019
N7+(2019) => ~34.46M USD
N5(2020) => ~2861.92M USD
"We still expect some using the EUV and some will still stay in the N7. Because for those customer in the N7, in the 2-year cadence, they moved to N5 already. So they have no reason to go back to use N6. However, as I said, for the second wave of the product, they're using N6 with the benefit of lower die cost and better performance."
^-- 3Q2019
N6 has replaced N7+ as a second-wave and third-wave product. Which is proven:
View attachment 30161
BREAKING | UNISOC Launches New-Gen 5G SoC T7520
Shanghai, China, 26 Feb 2020 – UNISOC, a leading global supplier of mobile communication and IoT chipsets, today officially launched its new-generation 5G SoC mobile platform – T7520. Using cutting-edge process technology, T7520 enables an optimized 5G experience with substantially enhanced AI...
7+ is only blurbed in 1Q20 and 5 is hyped in 2Q20.
=> Moving into third quarter 2020, we expect our business to be supported by strong demand for our industry leading 5-nanometer and 7-nanometer technologies, driven by 5G smartphone, HPC and IoT-related applications.
Then, there is a split => N5 and expect a strong ramp up of N5 in the second half of this year, driven by both 5G smartphones and HPC applications.
Smartphone market and HPC market is N5. Be really weird if someone else is first on 5nm datacenter CPU.
And I thought we were back to normal here after Mr. SMT4 guy disappeared. Oh well. Only a few weeks to find out you are totally wrong.
Im still rocking X370, and am looking at moving to Zen3 but from whats been said I am going to need to purchase a new motherboard.
Is a new chipset going to be released with Zen3, or will X570, B550 still be the premium choices for motherboard platform ?
And whats the general consensus on when we will see Zen 4 with DDR5 so I can get a rough idea on how long a new motherboard is going to tie me over for ?
Cheers
Is a new chipset going to be released with Zen3, or will X570, B550 still be the premium choices for motherboard platform ?
And whats the general consensus on when we will see Zen 4 with DDR5 so I can get a rough idea on how long a new motherboard is going to tie me over for ?
Cheers
Thunder 57
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No 300 series chipset will support Zen 3. Almost certain on that.
Will there be a new chipset for Zen 3? I doubt it. The "new" chipsets for Zen 3 seem to be B550 and A520.
Zen 4 will almost certainly be on AM5 (which I expect to be LGA) with DDR5 and probably PCIe 5. I wouldn't expect that until H1 2022. And whenever one has to say H1, expect that to be Q2 2022. Depending on how DDR5 moves along though even Q3 wouldn't surprise me.
1. Lose first 5nm datacenter CPU & GPU.
or
2. Remain first on new node datacenter CPUs & GPUs.
AnandTech | Gallery - Rome Presentation Slide Deck - 22 Photos
AnandTech | Gallery - Rome Presentation Slide Deck - 22 Photos
AnandTech | Gallery - Rome Presentation Slide Deck - 22 Photos
AnandTech | Gallery - Rome Presentation Slide Deck - 22 Photos
AnandTech | Gallery - Rome Presentation Slide Deck - 22 Photos
Be really bad execution if AMD isn't on 5nm.
5nm FinFet TSMC and Sec8 Samsung => Sr Mask Design Engineer - NVIDIA
TSMC 5nm Arm®v8 based processor plus H100, first. Would be a bad sign.
AMD lost their edge, first slip up since moving to TSMC, etc. Everyone else is on 5nm except AMD. AMD Gaff makes x86 finally lose market share to ARM.
Since, there is re-use everything for 7nm+ would be 5nm. If they want to be first and show themselves for momentum execution.
1Q2018 = "At N5, with more extensive use of EUV, we have obtained consistent double-digit yield on 256-megabit SRAM as well as our larger testchip."
The 5nm timeline is heavily skewed. It happened much earlier than anyone here apparently can tell.
TSMC 5nm in early 2018 is small EARLY test chips.
TSMC 5nm in late 2019 is big LATE test chips.
5nm tapeouts are also begun in 2Q2019: "Our N5 technology development is well on track. N5 has entered risk production in first quarter, and we expect customer tape-outs starting this quarter... "
This in turn is about right smack on 7nm+, which is why it was sub-100 million and 5nm annual revenue was 10% and 8% for 2020.
3Q2017 "This N5 technology will also support high-speed standard cells featuring extreme low Vt transistor, low RC interconnect, high-density capacitor and high-performance computing interconnect design scheme. Those features are designed for applications in server, CPU, GPU, network processor and FPGA."
N7+ timetable is too close to N5 for N7+ to have been chosen especially with AMD being the first to N5.
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moinmoin
Diamond Member
- Jun 1, 2017
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Either you guys want leaks and get an excited NostaSeronx instead, or you have patience until October 8th instead.
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