Speculation: Ryzen 4000 series/Zen 3

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DrMrLordX

Lifer
Apr 27, 2000
15,742
4,706
136
I see a 4800X in your future.
Depends on what it is! Is it 8c? I sort of like the 12c chip I have now, so if the core counts stay the same then 5900x or whatever is what I had wanted . . . we'll see.

I do hope AMD's future chips do a better job of distributing heat through the IHS so oversized cooling has a better effect.
 

Valantar

Golden Member
Aug 26, 2014
1,792
507
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I was referring to the 5nm node capacity left over from Huawei at "launch". Which is only LP node.

Unless AMD decide to use 5nm node on its Mobile APU at 5nm's launch ( i.e Expensive ) . Which I think ( I may be wrong, I thought we are talking about Zen 3 ) is not the issue we were discussing.

It is important to note this is launch capacity, which is the tight spot. There are not issues once you move past launch phases, market seems to have infinite appetite for wafers.
Is it at all likely that TSMC 5nm LP is made on different equipment than AMD's reported 5nm node? I'm not saying reconfiguring (parts of) a fab configured to 5nm LP to AMD's 5nm "HP"(?) would be trivial, but it doesn't sound impossible either. It's not like they're building a new fab for this node.
 

amrnuke

Senior member
Apr 24, 2019
832
996
96
Regarding 5nm capacity I think it's a foregone conclusion that A14, Exynos 992, etc. are on that process, of some variety. And the second Huawei canceled their 5nm 10K order, Apple took that capacity.

By reports, TSMC's 5nm capacity is completely booked until the end of 2020, as is 7nm capacity.

Would be curious to know whether AMD has any of that 5nm capacity for 2020 for sampling for Genoa?
 

ksec

Senior member
Mar 5, 2010
411
100
116
Is it at all likely that TSMC 5nm LP is made on different equipment than AMD's reported 5nm node? I'm not saying reconfiguring (parts of) a fab configured to 5nm LP to AMD's 5nm "HP"(?) would be trivial, but it doesn't sound impossible either. It's not like they're building a new fab for this node.
It is different set of design rules and flows. So not so much about equipment. But by sticking to LP at launch you get much better economy of scale. Hence if you are trying to fill up capacity from LP, you will find LP partners to do so.

Not to mention any gap could easily be shuffled around using Apple / Qualcomm's order ( Bringing their orders forward ).

I am not saying it is impossible. Everything is technically possible as long as you are willing to pay, it is just not very economical in doing so.

Not to mention I also think people are fantasising too much about these changes. Fabs and Node Design changes take times in months if not years in advance. Compare to media fabricating a news story that takes minutes if not seconds.

I am also eagerly waiting for TSMC 5nm to come out and ship. And hopefully I would finally prove a point I wanted for the past 4-5 years.
 
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Valantar

Golden Member
Aug 26, 2014
1,792
507
136
It is different set of design rules and flows. So not so much about equipment. But by sticking to LP at launch you get much better economy of scale. Hence if you are trying to fill up capacity from LP, you will find LP partners to do so.

Not to mention any gap could easily be shuffled around using Apple / Qualcomm's order ( Bringing their orders forward ).

I am not saying it is impossible. Everything is technically possible as long as you are willing to pay, it is just not very economical in doing so.

Not to mention I also think people are fantasising too much about these changes. Fabs and Node Design changes take times in months if not years in advance. Compare to media fabricating a news story that takes minutes if not seconds.

I am also eagerly waiting for TSMC 5nm to come out and ship. And hopefully I would finally prove a point I wanted for the past 4-5 years.
Yeah, I don't find that rumor plausible either (doesn't fit AMD's roadmap, and bringing forward a design on that scale seems extremely unlikely). But those would be the reasons, not "the free capacity is 5nm LP, not HP!". Some people seem to assume that if free capacity exists even for a moment, AMD is the only one who can grab it, and that they will and must do so regardless of their previous plans and roadmaps. That doesn't compute in my head.
 
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mopardude87

Platinum Member
Oct 22, 2018
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Depends on what it is! Is it 8c? I sort of like the 12c chip I have now, so if the core counts stay the same then 5900x or whatever is what I had wanted . . . we'll see.
I am prob gonna stick to a 12 c chip if the boost clocks on the 4000 series look very good. Outside of folding, this chip is insanely overkill for what i need it for.
 
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Ajay

Diamond Member
Jan 8, 2001
6,949
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Regarding 5nm capacity I think it's a foregone conclusion that A14, Exynos 992, etc. are on that process, of some variety. And the second Huawei canceled their 5nm 10K order, Apple took that capacity.

By reports, TSMC's 5nm capacity is completely booked until the end of 2020, as is 7nm capacity.

Would be curious to know whether AMD has any of that 5nm capacity for 2020 for sampling for Genoa?
That report was from April, thing have changed. I'm sure AMD can get enough wafers for verification work on Zen4.
 

ksec

Senior member
Mar 5, 2010
411
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I am going to take some guess work on the 5nm AMD Zen 3 rumours. Adding to what I have previously said.

It is likely DIgitimes got some sort of information TSMC will have 5nm HP production this year. And it was for a Desktop customer. They thought ( And it was likely true at the time ) this could only be AMD pushing their Zen 3 to 5nm.

Now that we know that is very likely to be Apple instead. As they plan to ship an ARM iMac soon.
 
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dr1337

Junior Member
May 25, 2020
12
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I am going to take some guess work on the 5nm AMD Zen 3 rumours. Adding to what I have previously said.

It is likely DIgitimes got some sort of information TSMC will have 5nm HP production this year. And it was for a Desktop customer. They thought ( And it was likely true at the time ) this could only be AMD pushing their Zen 3 to 5nm.

Now that we know that is very likely to be Apple instead. As they plan to ship an ARM iMac soon.
There is an article from a Taiwanese publication going around right now about TSMC ramping up their 5nm in one factory to 60k a month. And the article mentions both Qualcomm using this capacity, and AMD using this capacity specifically for high-end GPUs. So it seems like digitimes might have had some legit information after all, just not the biggest picture. No idea on the validity though, but from what I can find from google translating tons of articles, this seems to be the original source. I'm not familiar with Taiwanese hardware journalism either so this source could be totally bogus.
 

Det0x

Senior member
Sep 11, 2014
367
251
136
There is an article from a Taiwanese publication going around right now about TSMC ramping up their 5nm in one factory to 60k a month. And the article mentions both Qualcomm using this capacity, and AMD using this capacity specifically for high-end GPUs. So it seems like digitimes might have had some legit information after all, just not the biggest picture. No idea on the validity though, but from what I can find from google translating tons of articles, this seems to be the original source. I'm not familiar with Taiwanese hardware journalism either so this source could be totally bogus.
Maybe CDNA1 for the professional GPU market, AMD's counterpart to Nvidia's A100 PCIe/SXM.
Didn't AMD win some large server contracts with a Milan+CDNA combo ? Could make sense
 

juergbi

Junior Member
Apr 27, 2019
6
13
41
Maybe CDNA1 for the professional GPU market, AMD's counterpart to Nvidia's A100 PCIe/SXM.
Didn't AMD win some large server contracts with a Milan+CDNA combo ? Could make sense
The AMD investor presentation from April this year has a slide with CDNA on 7nm. Only CDNA 2 will be on an "Advanced Node".
 
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itsmydamnation

Platinum Member
Feb 6, 2011
2,002
1,269
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so funny story,

geekbench 5 barely convenience my 4700U to go above 2.4ghz, what a POS benchmark.......

saw a grand total of 12 watt peak package draw according to hardware mon

cpu-z benchmark , all 8 threads 4.2ghz.......


"processor_frequency": {
"frequencies": [
2333,
2257,
2317,
2394,
2251,
2423,
2473,
2317,
2373,
2282,
2328,
2303,
2451,
2284,
2493,
2436,
2431,
2439,
2379,
2438,
2253,
2383,
2329,
2276
]
},
 

tamz_msc

Platinum Member
Jan 5, 2017
2,549
2,236
106
so funny story,

geekbench 5 barely convenience my 4700U to go above 2.4ghz, what a POS benchmark.......

saw a grand total of 12 watt peak package draw according to hardware mon

cpu-z benchmark , all 8 threads 4.2ghz.......

That's strange as there definitely exist higher scores for th 4700U. Is the laptop plugged in?
 

dr1337

Junior Member
May 25, 2020
12
13
36
yeah 100% charge and plugged in ( i've tried 5 time now). As i said other benchmarks get the clock up to 4.2 call cores just fine.
lol this is getting pretty off topic, but geekbench does the same on my 3600. I think its the way the benchmark is designed because for the most part my 3600 never shows clocks go much above idle in ryzen master. For nearly the entire benchmark I run well under 3ghz, and only some of the benchmarks at the end like pdf-render will actually make the cpu boost into the 3-4ghz range.

Its probably got something to do with geekbench being a "universal benchmark" and some of the lighter workloads go by so fast that they never really stress the cpu that much.
 

MrTeal

Platinum Member
Dec 7, 2003
2,666
166
106
I spent a little time yesterday trying to lock my 3600 to 3.6GHz with no success. If anyone knows a way with current AM4 boards to force fixed clocks without downclocking, I'd be interested to know.
 

Richie Rich

Senior member
Jul 28, 2019
421
196
76
If Zen3 was sister core to K12,...
...and K12 had FPUs capable of SVE vectors...
...so maybe Zen3 will have SVE 2048-bit FPUs instead AVX512.

This would match the rumor about 50% increase in FPU intensive load. AMD did that with x86-64 instruction set extension in the past. I guess they might have a courage now to do it again now.

EDIT: And of course SMT4 ;)
 
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dr1337

Junior Member
May 25, 2020
12
13
36
If Zen3 was sister core to K12,...
...and K12 had FPUs capable of SVE vectors...
...so maybe Zen3 will have SVE 2048-bit FPUs instead AVX512.

This would match the rumor about 50% increase in FPU intensive load. AMD did that with x86-64 instruction set extension in the past. I guess they might have a courage now to do it again now.

EDIT: And of course SMT4 ;)
If only, AMD already confirmed way back in october that zen 3 is 64c max with only 2 way smt. And IMO if the 50% increase in FP performance is true, id imagine it comes from an increase in frequency and reduction in cache latency. AVX2 already hits zen 2 pretty hard on the clocks. The latest version of passmark had my 3600 choke to 3.2ghz single-core. Should zen 3 clock higher in FP workloads they directly increase performance without having to use up any more die real estate. It just seems like the most likely option to me especially considering AMDs huge focus on optimizing clockspeed with their latest GPUs and renoir.
 

amrnuke

Senior member
Apr 24, 2019
832
996
96
If only, AMD already confirmed way back in october that zen 3 is 64c max with only 2 way smt. And IMO if the 50% increase in FP performance is true, id imagine it comes from an increase in frequency and reduction in cache latency. AVX2 already hits zen 2 pretty hard on the clocks. The latest version of passmark had my 3600 choke to 3.2ghz single-core. Should zen 3 clock higher in FP workloads they directly increase performance without having to use up any more die real estate. It just seems like the most likely option to me especially considering AMDs huge focus on optimizing clockspeed with their latest GPUs and renoir.
Forum feature request: Block any post that's even a quote of a blocked user.

Zen3 will not be SMT4
I'm guessing he also mentioned 2048-bit somewhere in the post too, based on you talking about FP increases

It hurts my brain even imagining... I need some ibuprofen.
 

Richie Rich

Senior member
Jul 28, 2019
421
196
76
If only, AMD already confirmed way back in october that zen 3 is 64c max with only 2 way smt. And IMO if the 50% increase in FP performance is true, id imagine it comes from an increase in frequency and reduction in cache latency. AVX2 already hits zen 2 pretty hard on the clocks. The latest version of passmark had my 3600 choke to 3.2ghz single-core. Should zen 3 clock higher in FP workloads they directly increase performance without having to use up any more die real estate. It just seems like the most likely option to me especially considering AMDs huge focus on optimizing clockspeed with their latest GPUs and renoir.
As a matter of fact, AMD showed SMT2 in the presentation. The trick is that SMT4 core can be switched into SMT2 mode too, so that presentation was correct. AMD never said Zen3 has no SMT4. Prove me wrong and find any official denial of SMT4 by AMD.

Tachyum Prodigy is resurecting code-morphing Transmeta-like core. What if Zen3 uses code-morphing too? Maybe K12 was not canceled but rather merged with Zen3. So Zen3 will be able to run x86 code as well as ARM binaries. And support both AVX and SVE2 SIMD. AMD could gain from ARM's new features and faster development (better ISA ARMv9, 6xALUs, 2048-bit SVE2 FPU) while keeping x86 backward compatibility. That would be pretty smart move.
 

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