Speculation: Ryzen 4000 series/Zen 3

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moinmoin

Golden Member
Jun 1, 2017
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When a business is talking about a release date in vague terms the best practice is to assume the very latest possible date within the time span given, as businesses talk in CYA language. Which is why "later this year" should be read as "before 2021 (up to and including Dec. 31st 2020)". If it were Q3 they would say Q3, as that would make investors happy and drive up stock prices. Now, December 31st is unlikely due to it missing holiday sales, but late November or early December for Zen 3 hitting stores? Wouldn't surprise me even slightly.
Sure, but even you should agree that there is a difference between "later this year" (which AMD said regarding consumer Zen 3 chips) and "late this year" (which AMD said for Milan), and summarizing both as "late this year" is reducing the amount of information which may turn out to be wrong.

I assumed they were using a bit of insider info without specifically saying so.
You mean AT has insider info that Milan and Vermeer launch at the same time? Because that's what a conflation of both however fuzzy dates implies.
 

Ajay

Diamond Member
Jan 8, 2001
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You mean AT has insider info that Milan and Vermeer launch at the same time? Because that's what a conflation of both however fuzzy dates implies.
You did read that I 'assumed'. The conflation of two vague dates isn't really a reduction in information; the tiny differential is those two statements is pointless. AMD is being purposefully very vague.
It's like the almost stupid "roadmaps" they recently offered, WTH?


Sorry I'm being a bit pissy, but I miss the days of actual roadmaps that at least showed which quarter a product was coming out in; and I'm getting tired of there being less and less actually useful information given.
I'm sure all the big shareholders at the special private wallstreet teleconferences are being given more precise info, but this is all us plebes get.
 

amrnuke

Senior member
Apr 24, 2019
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You did read that I 'assumed'. The conflation of two vague dates isn't really a reduction in information; the tiny differential is those two statements is pointless. AMD is being purposefully very vague.
It's like the almost stupid "roadmaps" they recently offered, WTH?


Sorry I'm being a bit pissy, but I miss the days of actual roadmaps that at least showed which quarter a product was coming out in; and I'm getting tired of there being less and less actually useful information given.
I'm sure all the big shareholders at the special private wallstreet teleconferences are being given more precise info, but this is all us plebes get.
Reading the previous roadmaps, it appears likely that Vermeer rollouts will occur starting 2020 as AMD have stated, and continue with various other chips (4950X, 4300X, etc.) in a stepwise fashion until the end of 2021.

For Zen4, it looks like rollouts will then start in late 2021/early 2022, and continue into late 2022.
 

coercitiv

Diamond Member
Jan 24, 2014
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For Zen4, it looks like rollouts will then start in late 2021/early 2022, and continue into late 2022.
Actually, based on slide interpretation from the chipset thread, this slide "clearly" shows Zen 4 is to be delivered before January 1st 2022, meaning it is a 2021 product. :p

On a more serious note, there is no way of relialy reading a Zen 4 launch year from that slide, which kinda makes previous complaints about lack of accuracy in H1/H2 or late/later statements seem small potatoes.
 

Topweasel

Diamond Member
Oct 19, 2000
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Sorry I'm being a bit pissy, but I miss the days of actual roadmaps that at least showed which quarter a product was coming out in; and I'm getting tired of there being less and less actually useful information given.
I'm sure all the big shareholders at the special private wallstreet teleconferences are being given more precise info, but this is all us plebes get.
I think opposite, what we have gotten in the past when they were sloppier with the links was the engineering roll-out. The thing you give your development partners to lay out your long term plans so they can be prepared for the new product lines.

This type has always been the standard "business" road-map. Sometimes if they were talking about a single years release you might see some gradient on period of the year release. But nothing ever more than a year out.
 

Valantar

Golden Member
Aug 26, 2014
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I always get a kick out of it when a company uses H1/H2 instead of Q2/Q4. We know what you're up to.
Yeah, that's always fun. "H1/H2" just means "Q2/Q4 but we don't really want to admit that."
All technical data of AMD’s new “Renoir” desktop APU portfolio for AM4 at a glance | Exclusive Leak

very impressive!!

the 35W Version with 8C/16T looks awesome >> up to 4,35GHz CPU boost clk and 2.0GHz max GFX clk!
I would really like a 4c with more than 6 CUs for my HTPC, but overall, these look really good. Those iGPU frequencies are amazing, and definitely bode well for iGPU overclocks on the lower spec parts.
 

Olikan

Golden Member
Sep 23, 2011
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This IGP should overclock to 2.2~2.4Ghz.... This is... illegal.... Rdna2 might reach close to 3.0ghz?

I wonder if even mem. latencys might bottleneck the IGP at this speed
 
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DrMrLordX

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Apr 27, 2000
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This IGP should overclock to 2.2~2.4Ghz.... This is... illegal.... Rdna2 might reach close to 3.0ghz?

I wonder if even mem. latencys might bottleneck the IGP at this speed
Mem latency probably not, but bandwidth? Possibly.
 

Valantar

Golden Member
Aug 26, 2014
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Mem latency probably not, but bandwidth? Possibly.
Definitely, not possibly. Even with DDR4 >=3600 even a basic GDDR5 setup will be faster. There's a reason why dGPUs with lower CU counts typically outperform iGPUs with slower memory (yes, power is part of that reason, but memory bandwidth is arguably more important). That's why AMD's next platform with DDR5 will be really exciting for APUs (and hopefully before that laptops with LPDDR5).
 

DrMrLordX

Lifer
Apr 27, 2000
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Definitely, not possibly. Even with DDR4 >=3600 even a basic GDDR5 setup will be faster. There's a reason why dGPUs with lower CU counts typically outperform iGPUs with slower memory (yes, power is part of that reason, but memory bandwidth is arguably more important). That's why AMD's next platform with DDR5 will be really exciting for APUs (and hopefully before that laptops with LPDDR5).
Clocks are up, but CU count is down. Yeah I am familiar with how hungry APUs can be for memory bandwidth. It's less pronounced on lower CU counts.
 

Valantar

Golden Member
Aug 26, 2014
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Clocks are up, but CU count is down. Yeah I am familiar with how hungry APUs can be for memory bandwidth. It's less pronounced on lower CU counts.
... because fewer CUs at the same speed need less bandwidth to stay saturated with data to work on. As clocks increase, so do bandwidth requirements. There are some savings to be had by going this route, but they are minor, and certainly not enough to mean APUs are no longer limited by memory bandwidth.
 

Shivansps

Platinum Member
Sep 11, 2013
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All technical data of AMD’s new “Renoir” desktop APU portfolio for AM4 at a glance | Exclusive Leak

very impressive!!

the 35W Version with 8C/16T looks awesome >> up to 4,35GHz CPU boost clk and 2.0GHz max GFX clk!
Vega 8 at 2.1Ghz stock? oof. Thats probably means you can get to 2.4-2.5 with oc..

What black magic is this? as far i know the only changes they did were to reduce the CU count a little and cut ROPs by half, this along with the die shink results in massive freq gains... impressive.
 
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maddie

Diamond Member
Jul 18, 2010
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Vega 8 at 2.1Ghz stock? oof. Thats probably means you can get to 2.4-2.5 with oc..

What black magic is this? as far i know the only changes they did were to reduce the CU count a little and cut ROPs by half, this along with the die shink results in massive freq gains... impressive.
In a past post, I remember it being said that there were a few internal changes to allow for better clocking. I remember you denying it. This was when you were screaming about the reduction in CUs.

Possibly this is what was always expected of Vega in the clocks department. A few critical pathways sabotaging the whole.
 

Shivansps

Platinum Member
Sep 11, 2013
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In a past post, I remember it being said that there were a few internal changes to allow for better clocking. I remember you denying it. This was when you were screaming about the reduction in CUs.

Possibly this is what was always expected of Vega in the clocks department. A few critical pathways sabotaging the whole.
They were never clear about what they did, it was all open to interpretation. They did a single slide about Vega in Renoir comparing it to Vega in Picasso mobile with that "54% faster", but Picasso mobile has lower clocks and limited to DDR4-2400.

There is nothing else to say about CU count, i never expected these to be slower than Picasso, that would be too much. Seeing the results in mobile and the very high freqs it can get to ill say now that is justified.
 
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maddie

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Jul 18, 2010
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They were never clear about what they did, it was all open to interpretation. They did a single slide about Vega in Renoir comparing it to Vega in Picasso mobile with that "54% faster", but Picasso mobile has lower clocks and limited to DDR4-2400.

There is nothing else to say about CU count, i never expected these to be slower than Picasso, that would be too much. Seeing the results in mobile and the very high freqs it can get to ill say now that is justified.
Do you expect a detailed circuitry analysis? Here is a excerpt from an article by Tom's. This is not a straight port to 7nm.

'AMD chose to stick with the Vega graphics engine found in its previous-gen Picasso APUs because its hasn't optimized Navi for mobile yet, but the company chose to make several architectural enhancements when it ported Vega from the 12nm to the 7nm node. That includes reducing the number of compute units (CU) from 10 to eight, but a range of improvements led to an overall performance increase of 59% per CU (based on TimeSpy test results).'
 
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maddie

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Jul 18, 2010
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The guy in question is possibly the premier guy in leaking details... about Samsung's phones?

Uh... odd source, I know, but a guy like this has credibility and a track record, and guys like that don't really 'leak' stuff they aren't sure of.

Definitely worth trusting if you ask me.
'The rumored improvement of Zen3 theory is about 15-17%. According to engineers, the actual performance of the sample may exceed this.'

If he's not a PC guy then maybe he didn't realize that the FPU throughput was rumored to be massively increased. I really don't see much different here than what was expected. We generally always expected a much higher performance increase in selective workloads.
 

.vodka

Golden Member
Dec 5, 2014
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Yeah, that's the Samsung leaks guy.

Nice info if that's average IPC increase over Zen2. That, and the higher FPU performance overall could actually support Forrest Norrod claiming performance in line of what you'd expect out of a new architecture I guess.
 

uzzi38

Senior member
Oct 16, 2019
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'The rumored improvement of Zen3 theory is about 15-17%. According to engineers, the actual performance of the sample may exceed this.'

If he's not a PC guy then maybe he didn't realize that the FPU throughput was rumored to be massively increased. I really don't see much different here than what was expected. We generally always expected a much higher performance increase in selective workloads.
I'll just say IceUniverse has done nothing more than made the info that >17% is happening public, and that it's not in regards to the FP performance rumour. It's overall.
 
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Glo.

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Apr 25, 2015
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Rumors from months ago touted that overall PERFORMANCE(Clock+IPC) improvement over Zen 2 will be around 20%.

However I am slightly disgusted that this type of "leak" comes out today, to start talking about AMD, instead of ... their competition.
 

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