The argument makes no sense. Cadence is not a natural law. Tick tock investor bs. You cant forcefully push things through without severe consequences. In this case it's not even economy as more resources wouldn't get it faster. If you need another metal layer spin so be it.
The way I see is AMD should try not fall behind TSMC's (and potentially Samsung's) process node cadence. That way they can always make the best use of what pure play foundries offer. So ideally each new Zen gen/refresh uses a rather current process node, and delaying new Zen gens may end up making a Zen gen pick up a "last gen" node or, worse, unnecessarily limits the sales window the specific Zen gen has before moving to the next node. Of course, skipping a node is still possible as well. For now I'm assuming the delays are early growing pains due to the change of foundries. This should improve going forward.
Totally wrong, PS5 is based on zen and Navi GPU. Sony is a big deal in gaming. This is in addition to the PC market.
Intel excactly shows why this cadence planning and idea of execution is something from hell. You need flexibility so you can adapt quick. That's what gets you in control. Adaptability.
I don't think Matisse was ever planned to be on GF's 7LP. After GF abandoned 7LP, wasn't it said by Papermaster or someone else that only one product was planned to be on that node and that they didn't expect roadmaps to change?
While AMD did say that roadmaps won't change, I don't think they mentioned how many products was planned on GF7nm. And I agree that being late by a quarter is no big deal.
Well, I think end of the year retail sales (so, if you had an October launch for zen3) would work out very well with the traditional end of year shopping season.
The magnitude of GloFo's failure can't really be understated. They were given the keys to the kingdom so to speak. IBM's process engineers are some of the best in the world, and even with that gift they still couldn't get it out the door and market it.
Well, these are really good frequency improvements, especially the boost frequency improvement of 4.2, up from 3.9. It also confirms SMT disabled on the 3200g; very high frequencies though for a ryzen 3. I still think a low bin frequency (~3.3-3.8 with 8t or 3.4-3.8 with 6t) would fit very nicely between 3200 and 3400. With native dual core Picasso there, I would think the binning strategy would change slightly from RR, so less quadcore dies will be disposed of as Athlons.
Dr. Su have a PhD that covers process tech as I recall. I think she studied soi as long way back as the mid 99ties. She is up front on process tech. She would have been 100% in control where gf was all the way and made the right adaption and negotiations of the wsa. Gf cancelling 7nm was probably more known to her than the bod of gf. I am pretty sure gf cancelling 7nm was seen as more of a great opportunity than a setback because it also meant gf couldn't fulfill their part. Far more upside imo.
Considering the 14nm IO chip I disagree. GF dropping 14nm probably had more to do with AMD's choice not move to GF's 7nm in future and them saying they will only be ordering legacy chips and the new IO chips from them in the future. AMD didn't move to TSMC because GF dropped 7nm, GF dropped 7nm because AMD went to TSMC for 7nm.
I think they would have a lot more appeal and margin for boxed products for budget DIY enthusiasts. Margin would be good if aimed at OC'ers who have their own coolers.
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