[SemiAccurate] Intel kills off the 10nm process

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Vattila

Senior member
Oct 22, 2004
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TSMC with zero experience in high frequency transistor design

This is untrue.

"The M8 is clocked to 5GHz, topping the M7's 4.13GHz. The latest generation processor has a 32KB L1 instruction cache, where the M7 has 16KB. The M8 has a 128KB L2 data cache per core, whereas the M7 has 256KB per core pair. Clearly, Oracle has figured its CPU needs a larger fast code cache near the execution engines and a rejig of the room at the back for stuff like program variables. The M8 can also issue up to four instructions at a time, compared to the dual-issue M7. This is about what you'd expect from a server-grade chip in 2017. […] Both are 20nm parts fabricated by TSMC"

https://www.theregister.co.uk/2017/09/19/oracle_sparc_m8_solaris/

Both TSMC and AMD have 5 GHz experience. So expect no less. Intel will have fierce competition from here — even if they manage to salvage 10nm and reach high frequencies matching 14nm++.
 

ehume

Golden Member
Nov 6, 2009
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. . .That said, the most surprising aspect of all this is not so much Intel screwing up plan A but not having a plan B in place when the original 10nm failed. It's even more bizarre they seem to have acted on a contingency plan to bridge the gap to a plan B with regards to production allocation way too late.

I'm hoping Intel will be open about the way they solved their issues next year (or God forbid the year after) but given the spotlight they've found themselves in, I am pretty sure they will, once their first 10nm+ products hit the shelves.

Maybe both Plan A and Plan B bit the dust. Can happen.
 

jpiniero

Lifer
Oct 1, 2010
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I think the final straw was the shortages and the need to repurpose the production lines for 14 nm.
 

jpiniero

Lifer
Oct 1, 2010
14,510
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There's no reason to believe the story, though.

It is SemiAccurate... but it definitely appears that Intel killed off the original 10 nm process for sure. What Icelake uses is being called 10 nm, but it's not 10 nm, you know what I mean?
 

.vodka

Golden Member
Dec 5, 2014
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I just don’t know how everyone is so sure of this based on one article by Charlie that’s stuck behind a paywall.

He's been reporting on the 10nm dumpster fire for a while, and he's been right on everything or almost everything? His sources on this matter seem to be quite sound.

The original 10nm is dead and buried, whatever has taken the "10nm" or "10nm+" label that Icelake will be built on, who knows what it actually is.
 
Mar 10, 2006
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This is untrue.

"The M8 is clocked to 5GHz, topping the M7's 4.13GHz. The latest generation processor has a 32KB L1 instruction cache, where the M7 has 16KB. The M8 has a 128KB L2 data cache per core, whereas the M7 has 256KB per core pair. Clearly, Oracle has figured its CPU needs a larger fast code cache near the execution engines and a rejig of the room at the back for stuff like program variables. The M8 can also issue up to four instructions at a time, compared to the dual-issue M7. This is about what you'd expect from a server-grade chip in 2017. […] Both are 20nm parts fabricated by TSMC"

https://www.theregister.co.uk/2017/09/19/oracle_sparc_m8_solaris/

Both TSMC and AMD have 5 GHz experience. So expect no less. Intel will have fierce competition from here — even if they manage to salvage 10nm and reach high frequencies matching 14nm++.

Big difference between a very narrow core like the ones used in M8 and something like SKL. Also keep in mind that there is also a big difference between something that's intended to be sold as part of very low volume/high value systems and a mass market PC processor.
 
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maddie

Diamond Member
Jul 18, 2010
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Big difference between a very narrow core like the ones used in M8 and something like SKL. Also keep in mind that there is also a big difference between something that's intended to be sold as part of very low volume/high value systems and a mass market PC processor.
M8 is a very narrow core and can still run 8 threads? Come again.

Very low volume/high value parts can clock higher than high volume parts? Explain that again.

Wow, anything to denigrate the potential possibility of Zen2 clocking high.
 
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Mar 10, 2006
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M8 is a very narrow core and can still run 8 threads? Come again.

Issue/backend width and SMT are orthogonal.


Very low volume/high value parts can clock higher than high volume parts? Explain that again.

When you have to build parts in mass quantities and sell them at a price that's acceptable for consumer PCs, your constraints on what SKUs/bins you can offer are far different than if you're building a chip that won't ship that many units and will be wrapped in expensive hardware/software.
 
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Nothingness

Platinum Member
Jul 3, 2013
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Big difference between a very narrow core like the ones used in M8 and something like SKL. Also keep in mind that there is also a big difference between something that's intended to be sold as part of very low volume/high value systems and a mass market PC processor.
Fujitsu XII looks much more advanced and reaches 4.2 GHz on TSMC 20nm. Doesn't look too bad.

Anyway the original comment was "TSMC with zero experience in high frequency transistor design". This is wrong.
 
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maddie

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Jul 18, 2010
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Issue/backend width and SMT are orthogonal.




When you have to build parts in mass quantities and sell them at a price that's acceptable for consumer PCs, your constraints on what SKUs/bins you can offer are far different than if you're building a chip that won't ship that many units and will be wrapped in expensive hardware/software.
Yet strangely enough, Intel's highest clocked CPUs are the mass market, lowest cost ones. Come again.
 
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jpiniero

Lifer
Oct 1, 2010
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I think part of this was also because of the need to get moving on 7. Given that TSMC has talked about HVM for 5 EUV in 2020, it's possible AMD could ship products using it in 2021, certainly Apple will be shipping products then. You'd be talking about a short node anyway, Intel has just simply taken too long to fix 10 nm.
 
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moinmoin

Diamond Member
Jun 1, 2017
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I'd wager TSMC doesn't have "two separate 7nm FinFET tracks: one optimized for mobile applications, the other for high performance computing applications" just for shits and giggles. They'll want to push for high frequencies for the latter track, especially as it will allow direct comparisons with Intel from now on.

Also I think the focus on brute force high frequencies is pretty misleading. Efficient high performance at the highest possible frequency is what's demanded in both mobile and server environment where saving on power consumption and heat trumps everything. Brute force overclocking to high frequencies disregarding more efficient frequencies (even if done at stock) is a specific niche among desktop enthusiasts.
 

Excessi0n

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Jul 25, 2014
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The Intel 10nm that gets released isn't going to be the same as the original (which is broken, so changes need to be made to fix it), but that doesn't mean that it won't still deserve to be called a 10nm process.
 

IntelUser2000

Elite Member
Oct 14, 2003
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Fujitsu XII looks much more advanced and reaches 4.2 GHz on TSMC 20nm. Doesn't look too bad.

Anyway the original comment was "TSMC with zero experience in high frequency transistor design". This is wrong.

None of it probably matters at 5GHz, where fundamental limits are being hit(and exotic cooling solutions are required beyond that). Lots of such chips are already running water cooling.

The laws of physics become a sort of an equalizer. You are seeing CPUs that wildly differed in frequency, implementation, architecture, ISA starting to converge in a very similar way.

Also such limits are very favorable to circuits that were significantly behind before. This doesn't apply just to CPUs, but to all semiconductors. NAND, per transistor was far more dense than any CPU or GPU. It hit that limit way back, and now it has to vertical stack to scale.

Such an equalizer allows us to have way more powerful ultra low power chips than ever before, and even the low end chips are very usable.
 

beginner99

Diamond Member
Jun 2, 2009
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That said, the most surprising aspect of all this is not so much Intel screwing up plan A but not having a plan B in place when the original 10nm failed. It's even more bizarre they seem to have acted on a contingency plan to bridge the gap to a plan B with regards to production allocation way too late.

Maybe what we saw with kaby-lake and coffeelake was Plan B. But Intel didn't have a Plan C, eg. expecting a delay this long. Hence the production bottleneck. And the fact they are pouring in 1 Billion now tells me their 10nm, whatever it is, in high volume is still a long way off. Cascade-Lake now, Cooper-Lake in a year and Icelake-Server end of 2020. So 2 years from now.

AFAIK they can't skip cascade-lake as intel always offers at least 1 upgrade for a specific platform. Hence if something gets canned it would be cooper lake but the fact they but it on roadmaps and invested resources in it tells me they don't have much trust in being able to produce large dies with good enough yield on 10nm any time soon.
 
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LTC8K6

Lifer
Mar 10, 2004
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It is SemiAccurate... but it definitely appears that Intel killed off the original 10 nm process for sure. What Icelake uses is being called 10 nm, but it's not 10 nm, you know what I mean?
Yes, it's 10nm+ :)

This has been discussed often around here. :)
 

jpiniero

Lifer
Oct 1, 2010
14,510
5,159
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Maybe what we saw with kaby-lake and coffeelake was Plan B. But Intel didn't have a Plan C, eg. expecting a delay this long. Hence the production bottleneck. And the fact they are pouring in 1 Billion now tells me their 10nm, whatever it is, in high volume is still a long way off. Cascade-Lake now, Cooper-Lake in a year and Icelake-Server end of 2020. So 2 years from now.

There was a roadmap leak that suggests that Intel isn't going to release anything new for servers in 2020 but perhaps in Early 2021. To me that suggests the Rapids, which I imagine they were going to have to do anyway for competitive reasons even before the demise of the old 10 nm.
 

IntelUser2000

Elite Member
Oct 14, 2003
8,686
3,785
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Maybe what we saw with kaby-lake and coffeelake was Plan B. But Intel didn't have a Plan C, eg. expecting a delay this long. Hence the production bottleneck.

The way I see it,

Plan A(main one): 10nm being developed in a timely manner
Plan B: Kabylake. A year delay is bad, but still manageable
Plan C: Should have been a updated architecture chip on 14nm. Instead, its Coffeelake
 

NostaSeronx

Diamond Member
Sep 18, 2011
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12th Sapphire Rapids 7nm -> 2020
13th Granite Rapids 7nm+ -> 2021

10nm++ is being renamed into 7nm btw. It does include a new transistor stack and the removal of cobalt and ruthenium. I believe Intel is switching to nickel interconnects do to nickel costing close to copper.

Aluminum -> Copper -> Nickel -> Cobalt -> Ruthenium -> Tungsten
Low cost to high cost, total cost not just material cost.
 
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IntelUser2000

Elite Member
Oct 14, 2003
8,686
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@NostaSeronx

Can you at least get one of your speculative posts right? I mean, you are getting into fanfiction territory. Your posts are cryptic, and not far-fetched just enough so most people see it as a plausible scenario. I'm pretty sure there are people that are interested in reading CPU fanfiction. What you write is definitely enjoyable to read. However is it real?

I'm pretty sure there are many sites around the internet related to theories and speculations about the real world which are really fanfiction in disguise. Pretending its a real thing, does not make it real. Some people are quite gullible. Those sites don't help.
 

mikk

Diamond Member
May 15, 2012
4,112
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He's been reporting on the 10nm dumpster fire for a while, and he's been right on everything or almost everything? His sources on this matter seem to be quite sound.


He claimed XMM 7660 is made on Intels 10nm which turned out to be wrong, also there is no sign of a 14nm+++ variant. Based on this everyone was talking like a fact that CFL-R is made on a 14nm+++ variant which turned out to be wrong as well.
 
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jpiniero

Lifer
Oct 1, 2010
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https://twitter.com/david_schor/status/1064922837197209600

David Schor is suggesting that the 8160 (5G modem) is going to be fabbed at TSMC. Doesn't say what node. Makes sense, given they have to make Apple's deadline or they will lose the contract forever and presumably at the time of the decision couldn't have trusted that the New 10 nm node would have worked out.

That ends up being the case, you might only see Icelake Client, the FPGAs, and maybe some chipsets if it was easy to port over to the New 10 nm process. Everything else intended for Old 10 nm would be cancelled (or ported to TSMC if it made sense and was possible?) and they will just rush out some version of 7 nm ASAP.

Yes, it's 10nm+ :)
This has been discussed often around here. :)

That version was cancelled for sure. What I am suggesting now is that the New "10 nm" is either a brand new process with no relation with anything or the lineage is from 14 nm's SoC process with easy density and quality upgrades. But neither would come close to Cannonlake's density.