[seekingalpha] AMD Responds To Kaveri Delay Rumors - "on track for 2013"

[mrmt]

At what die size?

This. AMD is selling for the same price almost a die almost twice as bigger as Haswell. In the end the only thing getting spanked here is AMD margins.

 

[NostaSeronx]

Weaker than Ritchland in what way ???

Slower core and lower clocks and poor real GFlops.

At what die size?

250 mm² based on the BGA shown at Computex. https://www.youtube.com/watch?v=ueHW0bJuZPQ&t=1440s

Continue gazing into your crystal ball and explain to me the magical other-worldly statement that is "Steamroller is a weaker yet more efficient Piledriver core".

AGUs in the x86 core are no longer needed for loads/stores for the FPU units. The decode is constantly pumped rather than half-pumped. You have more registers and more efficient shuffle instructions increasing locality performance. The issue is execution unit wise you still have 2 64-bit ALUs/2 64-bit AGUs and you have a smarter smaller FPU with 2 x 128-bit FMAC and 1 x 128-bit FSTORE unit or 2 x 128-bit FSTORE, all MMX integer arithmetic units have been placed into the FMACs. There is more but most of it is in this:
http://www.anandtech.com/show/6201/amd-details-its-3rd-gen-steamroller-architecture

 

[sushiwarrior]

AGUs in the x86 core are no longer needed for loads/stores for the FPU units. The decode is constantly pumped rather than half-pumped. You have more registers and more efficient shuffle instructions increasing locality performance. The issue is execution unit wise you still have 2 64-bit ALUs/2 64-bit AGUs and you have smarter smaller FPU with 2 x 128-bit FMAC and 1 x 128-bit FSTORE unit or 2 x 128-bit FSTORE, all MMX integer arithmetic units have been placed into the FMACs.

"AGUs in the x86 core are no longer needed for loads/stores for the FPU units."
"execution unit wise you still have 2 64-bit ALUs/2 64-bit AGUs"

wat

So what you're saying more or less is that HSA "optimization"/removal of redundancies will make the core slower. This won't matter if HSA actually works as intended...

 

[SiliconWars]

This. AMD is selling for the same price almost a die almost twice as bigger as Haswell. In the end the only thing getting spanked here is AMD margins.

Yeah and Intel spends countless billions on building fabs in order to support their margins. In one hand, out the other in a never-ending cycle. Or well that is until it gets too expensive to keep building fabs. Then what happens?

 

[NostaSeronx]

So what you're saying more or less is that HSA "optimization"/removal of redundancies will make the core slower.

The only thing that needed HSA optimization was the GPU and NB.

Kaveri has IOMMU v2.5 and Volcanic Islands.

 

[AtenRa]

At what die size?

Does the consumer cares about die sizes ??

 

[inf64]

Steamroller will not be slower than Piledriver...

 

[AtenRa]

Slower core and lower clocks and poor real GFlops.

Ehm, how that makes it slower than PileDriver ???

 

[AtenRa]

This. AMD is selling for the same price almost a die almost twice as bigger as Haswell. In the end the only thing getting spanked here is AMD margins.

Not all fabrications are equal.

Broadwell die will be smaller than Haswell, do you actually believe it will also be cheaper to produce ???

 

[Arachnotronic]

Does the consumer cares about die sizes ??

You think that the only people here are just consumers?

Some of us are interested in AMD the business.

 

[Arachnotronic]

Not all fabrications are equal.

Broadwell die will be smaller than Haswell, do you actually believe it will also be cheaper to produce ???

Yes.

 

[sushiwarrior]

The only thing that needed HSA optimization was the GPU and NB.

Kaveri has IOMMU v2.5 and Volcanic Islands.

Isn't one of the eventual goals of HSA to move stuff like FP work to GPUs (aka TCUs) if possible? Hence a strong FP unit isn't necessary in the CPU.

 

[NostaSeronx]

Isn't one of the eventual goals of HSA to move stuff like FP work to GPUs (aka TCUs) if possible? Hence a strong FP unit isn't necessary in the CPU.

So, basically you want AMD to break x86 and have awful performance with: x87, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AVX, XOP, AVX1.1, AVX2, AVX3.

I see your point but benchmarks. HSA requires completely recompiled code and a completely different way of programming. In most cases your code won't be compatible with all vendors.

Giving a big middle finger to Intel isn't something you want to do on the software front. HSA is a dead pre-developed whale and it won't get past the perfect and clean homogenous platform. HSA will go the path of HTX and not be used ever.

 

[sushiwarrior]

So, basically you want AMD to break x86 and have awful performance with: x87, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AVX, XOP, AVX1.1, AVX2, AVX3.

I see your point but benchmarks. HSA requires completely recompiled code and a completely different way of programming. In most cases your code won't be compatible with all vendors.

Giving a big middle finger to Intel isn't something you want to do on the software front. HSA is a dead pre-developed whale and it won't get past the perfect and clean homogenous platform. HSA will go the path of HTX and not be used ever.

HSA would require recompiled code, and additional use of GPU/shared memory coding possibly, but it comes with giant performance gains, rather than losses. More people are on board with HSA than are against it, leaving it to be essentially "the world vs. Intel(/Nvidia)".

HSA is a gamble, it's definitely got a giant hill ahead of it, I just hope it becomes a standard because all I see is performance gains and better efficiency.

 

[AtenRa]

I dont know why people forget what has been said only two months ago.

Lisa Su,
Senior Vice President and General Manager, Global Business Units

Computex 2013, June TaiPei

http://www.youtube.com/watch?v=ueHW0bJuZPQ&feature=player_detailpage&t=1558

We have been sampling parts to customers (OEMs etc) over the past several months and we will actually begin shipping Kaveri in 2013, towards the end of the Year.

Nobody at AMD has ever said about Launching Kaveri in 2013. And since AMD have officially said that Kaveri is on Track for 2013 they mean they are on track for Shiping Kaveri in late 2013 as they have said two months ago.

 

[AtenRa]

You think that the only people here are just consumers?

Some of us are interested in AMD the business.

You know what ??? When AMD spanks Intel in the bottom, its all about die sizes and margins :whiste:

Yes.

Then you should read more about IC and transistor manufacturing.

 

[Arachnotronic]

You know what ??? When AMD spanks Intel in the bottom, its all about die sizes and margins :whiste:



Then you should read more about IC and transistor manufacturing.

I read plenty and know the industry quite well. Perhaps "Moore's Law" is concept you need to familiarize yourself with?

 

[mikk]

Core i3 Haswell haven’t been launched yet and when it will come it will eat dust both in CPU and iGPU from Richland.

Sorry I don't see it. Haswell i3 37W GPU performance should be pretty competitive against A4-A8 Richland if not faster. i3 CPU is faster, Richland isn't fast enough.

 

[USER8000]

This thread is surreal. Its the battle of the unreleased products!

 

[LegSWAT]

You think that the only people here are just consumers?

Some of us are interested in AMD the business.

Get real: costs per die is a numbers game!
The more expensive process (cutting edge, multiple exposure) needs a far higher unit volume to turn profitable than the lower cost process; even with a die half the size of your equally-priced competitor (and vice versa).

 

[LegSWAT]

HSA is a dead pre-developed whale and it won't get past the perfect and clean homogenous platform. HSA will go the path of HTX and not be used ever.

Have you just fallen out of a different parallel universe or do you actually have any quotable sources for your blatant statements?

 

[erunion]

Not all fabrications are equal.

Broadwell die will be smaller than Haswell, do you actually believe it will also be cheaper to produce ???

Of course it will be. Economics is the main driver of process shrinks. More dies per wafer means cheaper dies.

 

[Idontcare]

Get real: costs per die is a numbers game!
The more expensive process (cutting edge, multiple exposure) needs a far higher unit volume to turn profitable than the lower cost process; even with a die half the size of your equally-priced competitor (and vice versa).

I suspect you are conflating fixed development costs (which are amortized over the volume of product produced for years and years) with that of the incremental production costs (a per-wafer cost adder) added to a manufacturing line for new nodes.

The development cost, which must be amortized, is what drives the volume requirements for the node, whereas the "more expensive process" is generally (strictly) required to add no more than a 20% maximum cost to the wafer versus the previous node such that the xtors themselves realize a 30% cost reduction, node on node, when the areal reduction is factored.

 

[erunion]

Speaking to VR-Zone web-site, Roy Taylor, AMD’s vice president of channel sales, claimed that “AMD never said the launch would be before Christmas” of 2013, and that the next-generation code-named Kaveri accelerated processing unit “would be available shortly after its formal launch at CES”. He then said the “architecture itself was ready to go”, but attributed the delays of the launch to the fact that the “HSA’s marketing not yet being complete”.
link

So same as Richland then. Paper launch at CES in January with availability in March or April.

 

[mikk]

Mobile in June as usual I guess.