Discussion RDNA4 + CDNA3 Architectures Thread

[DisEnchantment]

With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits

History for llvm/lib/Target/AMDGPU - llvm/llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. - History for llvm/lib/Target/AMDGPU - llvm/llvm-project

github.com

Or Phoronix

More AMD "GFX940" Enablement Work Landing In LLVM - Phoronix

www.phoronix.com

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

Question - Speculation: RDNA3 + CDNA2 Architectures Thread

Man I have been dying to make this one for a while now. First rumours for RDNA3 are here so new thread time! Just going to start off with this one for now: kopite7kimi on Twitter: "@VideoCardz Ah, I mean a simple mcm design with 10240 cores is not enough. Because the lift from RDNA2 to RDNA3...

forums.anandtech.com

 

[SolidQ]

WGP is cursed

PS5pro is cursed with RDNA3 WGP?

 

[adroc_thurston]

PS5pro is cursed with RDNA3 WGP?

Wait a tiny little bit until I see STX1 iGFX results and then you'll have your asnwer.

 

[jpiniero]

what the hell is MI300 even.

Gaming is a lot different of course.

 

[adroc_thurston]

Gaming is a lot different of course.

The hard part of tiling and packaging and thermal engineering is done there.
MI300 is a milestone product; a real butcher and a technology demonstrator both.
What PVC would've been if it wasn't made of suck.

 

[jpiniero]

The hard part of tiling and packaging and thermal engineering is done there.

It certainly seems like it's easier to do chiplets for compute products compared to gaming.

 

[adroc_thurston]

It certainly seems like it's easier to do chiplets for compute products compared to gaming.

GPGPU maps to tiled things a lot easier than legacy graphics yes.
But doing the many many tiles 3D stacked monster of doom itself is a tricky thing.

 

[igor_kavinski]

PS5pro is cursed with RDNA3 WGP?

What if they just re-use RDNA2 with more CUs? That should be the logical thing to do to save from any potential headaches. The PS4 Pro GPU wasn't that much of a departure from the original PS4 GPU I think.

 

[adroc_thurston]

What if they just re-use RDNA2 with more CUs?

not area efficient.

The PS4 Pro GPU wasn't that much of a departure from the original PS4 GPU I think.

That was very Sony mandated their first parties to ship cross-gen, aka support different platforms at once.

 

[dr1337]

Allegedly the Navi 4C config that got canned:
View attachment 84418

This sounds like something that never existed.

Correct!
This had CU count in upper 200's and was going to cost you a kidney or two.

Incredible how some people know everything the moment another "leaker" says something. You couldn't say "Correct!" if you were actually under any NDA so its obvious that if you do know anything, you're just in the know of the MLID fandom.

 

[SolidQ]

RDNA2 with more CUs

RX 6800 60CU - Die Size520 mm². I dont think it will fit with APU.

 

[adroc_thurston]

This sounds like something that never existed.

This was the halo part.

Incredible how some people know everything the moment another "leaker" says something

I was linking the patent showcasing this exact thing like a zillion times.
Cease the copium inhalations.

You couldn't say "Correct!" if you were actually under any NDA so

Yes I would, after all, I'm just a magical girl.

 

[adroc_thurston]

RX 6800 60CU - Die Size520 mm². I dont think it will fit with APU.

That's area for the full N21 die, which is 80CUs and whole 128MB of LLC.
Not comparable.

 

[dr1337]

I was linking the patent showcasing this exact thing like a zillion times.
Cease the copium inhalations.

And its too hard for you to link them again or are you just being difficult on purpose?

 

[adroc_thurston]

And its too hard for you to link them again or are you just being difficult on purpose?

DIE STACKING FOR MODULAR PARALLEL PROCESSORS

Complete Patent Searching Database and Patent Data Analytics Services.

www.freepatentsonline.com

 

[dr1337]

DIE STACKING FOR MODULAR PARALLEL PROCESSORS

Complete Patent Searching Database and Patent Data Analytics Services.

www.freepatentsonline.com

So you know MLID is correct because of a year old patent that isn't very far off from the other AMD graphics chiplet patents that have come out in the years prior?

If you're of the opinion his speculation is on track because he is consistent with AMD patents, that's one thing. I highly doubt any of it is correct. Yet from that patent you know the CU counts? Dubious.

 

[adroc_thurston]

So you know MLID is correct because of a year old patent that isn't very far off from the other AMD graphics chiplet patents that have come out in the years prior?

I don't care about any ebeggars, just that the slideware in question is genuine and internal to AMD.

If you're of the opinion his speculation is on track

No one cares about any ebeggars.
Just the slide is genuine.

 

[igor_kavinski]

Yes I would, after all, I'm just a magical girl.

Girl??? Why didn't you say so? So easy to believe you now!

 

[adroc_thurston]

Girl??? Why didn't you say so? So easy to believe you now!

It's a joke.

 

[blackangus]

So they just get their engineers working on stuff without looking at all possible angles? God Bless their CPU design teams for keeping them afloat.

I think they know it can be done, but its easy to under estimate the effort in doing something new for the 1st time.
So then the question becomes - Do we push it out and miss a cycle? or Do we miss a product tier and make a cycle?
As long as it pans out its just the cost of doing something new, much like they did with ZEN and chiplets.
I remember someone from Intel saying 7 or 8 years ago "These chips are so complex that only 3 or 4 people in the entire company understand how every aspect works together, and in 10 years no one person will."

 

[igor_kavinski]

I remember someone from Intel saying 7 or 8 years ago "These chips are so complex that only 3 or 4 people in the entire company understand how every aspect works together, and in 10 years no one person will."

I think it's Intel themselves who have that problem

 

[branch_suggestion]

Correct!
This had CU count in upper 200's and was going to cost you a kidney or two.

18SE/288CU?
Knowing the patents this design was possible, but I thought for de-risking a single big AID using 2 N31 spec XCD's and the MID to the side would certainly be better for TTM, less validation. That would already be >800mm^2 with 12SE/192CU, ~384b GDDR7 and ~192MB of MALL. Already a >2x N31 part which should do just fine against top Blackwell.
But yeah, looks like they are going for the NV no existo route instead.

Other thing is RDNA4 might change the high level architecture hierarchy, I think CDNA is changing with MI300/400.

 

[adroc_thurston]

18SE/288CU?

Looked 9/270 to me.

But yeah, looks like they are going for the NV no existo route instead

Were.
Not anymore!

 

[branch_suggestion]

Looked 9/270 to me.

Were.
Not anymore!

9/270 indicates some pretty radical uArch changes. Odd numbered WGP based on earlier RDNA seems like it shouldn't work, so what, 3CU/WGP for 10WGP/SE? Or is the SE/SA changed? It really does lead to more questions. 9 SE does make more sense, FF is hitting diminishing returns so spamming all the compute shaders seems to be the way to go, not to mention RT perf scales from the number of cores above all else.

 

[adroc_thurston]

Or is the SE/SA changed?

Yeah.

 

[A///]

it goes without saying he's a moron and a waste of time but has anyone looked into mlid's new video about rdna4 or his claims?