There are changes that can be made to cache beyond size and latency. Stuff like the number of ways, number of read and write ports, prefetch and eviction strategies, even changing its basic design (number of transistors per bit) to affect its power efficiency. Trying to compare the caches of different CPU designs based on only two numbers is missing a lot of information.
Everyone doing CPU design has access to simulation tools that can model the effect of various changes in all the figures of merit. They won't necessarily all converge on a single solution because there are other things about their CPU designs that are different. i.e. the target clock rate, power consumption, chip size/cost for their market, and so forth. It is quite possible that Apple's solution is the best one for their needs and Intel's solution is the best one for theirs even though they are not alike. It is also possible everyone will eventually converge around a similar cache plan, but I doubt it.