Official AMD Ryzen Benchmarks, Reviews, Prices, and Discussion

[T1beriu]

Im surprised no one posted this yet

I'm surprised you missed the post just right before yours.

 

[Dygaza]

Interesting to see if anyone can actually get memory to run at 4000MHz.

 

[The Stilt]

Interesting to see if anyone can actually get memory to run at 4000MHz.

3600MHz will probably be the highest MEMCLK doable for 24/7 use.
We're already seeing signaling limitations, even below that.

The performance improvements from going above 3200MHz are rather diminishing, as the performance gain from the higher fabric bandwidth / lower latency isn't infinite.
At 3200MHz MEMCLK it is better to reduce the latency as much as possible, rather than shoot for the higher clocks. If you could do both at the same time, obviously that would be the best case.

The memory controller can now do >= 3200MHz with the highest possible memory configuration (2DPC dual rank, 8Gb per IC), which is IMO more important and impressive that the highest supported MEMCLK on paper.

 

[hotstocks]

@TheStilt,
Currently I have a 2X8 16 gb G.skill 3600 C16 samsung b-die single sided kit. I am mainly interested in gaming, so the highest infinity fabric is most important to me, but I also would like 32gb. I can run this kit at 3456mhz C14-14-14-34 1T, but the latency is still kinda high around 69ns. Or I assume if I fiddle with sub-timings and other stuff enough I might get it to 3600mhz C16 2T, but I would assume that would be slower than the 3456mhz C14 1T that I am at, so no point, as you said 150 more mhz on infinity fabric won't help games much. So now my dilema is do I just buy the same exact kit I have now and populate all 4 ram slots to get 32gb, and will that allow me to get the same 3456mhz or will I only be at 3200? Or should I just order the best highest performing 32gb 16X2 kit and sell my kit? If the later is the case, can you recomend one or two 32gb kits that will for sure clock the highest and with low latency like you described? Because I don't really know what 2DPC dual ran, 8GB per IC means as far as what kit to buy. Assume money is no object (within reason) and I want the fastest infinity fabric, memory, and lowest latency of course. Thanks
P.S. And I don't need any RGB shit that corrupts and just costs more, unless it is the fastest/best kit

 

[DrMrLordX]

The performance improvements from going above 3200MHz are rather diminishing,

Even in situations where there's high traffic between CCXs?

 

[The Stilt]

Even in situations where there's high traffic between CCXs?

In typical benchmarks or real world applications / games.
Zeppelin cannot clock high enough for the bandwidth / latency available at 3200MHz MEMCLK (w/ decent latencies) to become a problem.
If AMD was to release a refresh of Zeppelin on a better process, offering significantly higher Fmax (e.g. 4.5GHz), then that would be another story.

 

[The Stilt]

@TheStilt,
Currently I have a 2X8 16 gb G.skill 3600 C16 samsung b-die single sided kit. I am mainly interested in gaming, so the highest infinity fabric is most important to me, but I also would like 32gb. I can run this kit at 3456mhz C14-14-14-34 1T, but the latency is still kinda high around 69ns. Or I assume if I fiddle with sub-timings and other stuff enough I might get it to 3600mhz C16 2T, but I would assume that would be slower than the 3456mhz C14 1T that I am at, so no point, as you said 150 more mhz on infinity fabric won't help games much. So now my dilema is do I just buy the same exact kit I have now and populate all 4 ram slots to get 32gb, and will that allow me to get the same 3456mhz or will I only be at 3200? Or should I just order the best highest performing 32gb 16X2 kit and sell my kit? If the later is the case, can you recomend one or two 32gb kits that will for sure clock the highest and with low latency like you described? Because I don't really know what 2DPC dual ran, 8GB per IC means as far as what kit to buy. Assume money is no object (within reason) and I want the fastest infinity fabric, memory, and lowest latency of course. Thanks
P.S. And I don't need any RGB shit that corrupts and just costs more, unless it is the fastest/best kit

1.0.0.6 AGESA, combined with the new memory controller FW variant should allow you to 3200 - 3466MHz on four 8GB DIMMs already.
Personally I would get another identical kit and use four modules, as from the CPU side it won't be a problem from now on.

3466MHz CL14-14-14 is significantly easier (i.e. requires significantly less voltage) than 3200MHz 12-12-12 so that should be your target.
Depending on the motherboard it shouldn't be too hard to achieve either. If you have a C6H you can use 9945 bios to do that already.

 

[hotstocks]

Thanks. I do have an 1800X at 3.95ghz, Corsair 1000Wpsu, Nvidia 1080, Corsair H100i, and C6H, on bios 9943 now. So I will take your advice, buy an identical kit and move to 9945 or next official bios. I thought for some reason dual sided/rank? were faster because they interleave. Or that 2 16gb sticks are faster than 4 8gb sticks. But if you say 4 8 gb sticks are faster I will do that.
But my memory on 9943/9945 at 3456mhz same timings is slower than on last official at 3350mhz! I've fooled around with everything, but can you think of a timing, setting, ect. that would make the same speed on the new betas a lot slower/higher latency, that I should set? Or is it just because it is beta and final will be same performance?

 

[IEC]

Each memory strap up utilizes higher (i.e. slower) subtimings. That's why 1.0.0.6 is great because it finally gives you control over more subtimings, allowing you to use 3200 (or better) strap subtimings with your 3400/3466 settings. Which should allow for lower latency.

 

[The Stilt]

Thanks. I do have an 1800X at 3.95ghz, Corsair 1000Wpsu, Nvidia 1080, Corsair H100i, and C6H, on bios 9943 now. So I will take your advice, buy an identical kit and move to 9945 or next official bios. I thought for some reason dual sided/rank? were faster because they interleave. Or that 2 16gb sticks are faster than 4 8gb sticks. But if you say 4 8 gb sticks are faster I will do that.
But my memory on 9943/9945 at 3456mhz same timings is slower than on last official at 3350mhz! I've fooled around with everything, but can you think of a timing, setting, ect. that would make the same speed on the new betas a lot slower/higher latency, that I should set? Or is it just because it is beta and final will be same performance?

4xSR is just as fast as 2xDR modules, while 2xSR are somewhat slower.

 

[hotstocks]

Thanks, I'll order those today, unless some special faster/more stable Ryzen memory is due to come out? Those FlareX were a joke, just rebranded normal 3200 samsung b-die.

 

[Mopetar]

I'm surprised you missed the post just right before yours.

My seeing eye dog was at the vet for a checkup. I must need a stronger prescription.

 

[krumme]

@The Stilt
Is it possible to get more insight into how the new agesa improves outside of what is told by amd?

 

[hotstocks]

@TheStilt, thanks, just updated to 9935 getting ready for my other 2 sticks to come Tuesday. I am completely stable at 3468mhz using 3200 strap and 108 bclk/GEN 3. My procoD is 53 ohms I think and am at 1.4v (haven't tried lower till other sticks). When I have four 8 gb Samsung b-die, I am all set to go. I shouldn't need to change any settings or timings other than procoD right? And with 4 sticks what should procD be? Thanks again, finally getting the speed and stability I need.

 

[imported_jjj]

If AMD was to release a refresh of Zeppelin on a better process, offering significantly higher Fmax (e.g. 4.5GHz), then that would be another story.

If they work a bit on latency, memory clocks, maybe tune the cache a bit further while gaining 10-12% in clocks, that would be a solid second gen.

Lisa Su has stated that the recent Naples demos were not on final silicon and that does make one wonder about a new revision - too early for a second gen.

 

[The Stilt]

@The Stilt
Is it possible to get more insight into how the new agesa improves outside of what is told by amd?

The list of changes released for AGESA 1.0.0.6 is already rather extensive (and unusual).
There is a huge amount of changes, however individual changes and fixes implemented won't be available.
AGESA is a much larger and complex entity than people often assume. It is not a single binary, but a vast stack of separate binaries and firmwares (especially with Zeppelin).
The container number changing doesn't indicate that all of the binaries and firmwares in the stack contain changes, or vice versa

 

[T1beriu]

If EPYC has 128 PCIe lanes and 4 Zeppelin dies, shouldn't a single die Ryzen be able to have 32 PCIe lanes?

 

[itsmydamnation]

If EPYC has 128 PCIe lanes and 4 Zeppelin dies, shouldn't a single die Ryzen be able to have 32 PCIe lanes?

Zepplin has 32 10GHz phys. Those get used for all off chip services. Am4 dictates how they are used, some for SATA,usb,chip set,m.2 and gpu. On server mbs it will likely come down to oem designs....

 

[Veradun]

IIRC EPYC will be sold as a full SoC, as in "no chipset is needed", so there are also those 4 lanes that are exclusive for chipsets on the AM4 platform

 

[Mopetar]

If they work a bit on latency, memory clocks, maybe tune the cache a bit further while gaining 10-12% in clocks, that would be a solid second gen.

Lisa Su has stated that the recent Naples demos were not on final silicon and that does make one wonder about a new revision - too early for a second gen.

Non-final silicon isn't just about clock speeds. There's probably other things they're tweaking.

 

[The Stilt]

Lisa Su has stated that the recent Naples demos were not on final silicon and that does make one wonder about a new revision - too early for a second gen.

Where / when has she stated that?

 

[T1beriu]

Where / when has she stated that?

The public demonstrations that we’ve showed were versus a Broadwell architecture because that’s what’s currently available. But this was also not final silicon for EPIC. And so final silicon for EPIC will perform higher than what was benchmarked and we believe will be very competitive on dual socket platforms.

Source: Advanced Micro Devices (AMD) Presents at JPMorgan Technology, Media & Telecom Conference (Transcript), May 22nd 2017

 

[tamz_msc]

@The Stilt what do you think of the possibility of enabling the debug mode 2:1 DFCLK:MEMCLK for ThreadRipper and Epyc?

 

[The Stilt]

@The Stilt what do you think of the possibility of enabling the debug mode 2:1 DFCLK:MEMCLK for ThreadRipper and Epyc?

Pretty much none.

 

[tamz_msc]

That makes the question of how AMD is going to address the inter-CCX quirks in Naples and ThreadRipper even more intriguing.