New Zen microarchitecture details

[Abwx]

I never refer to a specific benchmark, unless I otherwise specify. The average is what counts.

Yet when i pointed 30% and 35-40% IPC advantage for HW re PD in 7ZIP and AI chess games you came back with a special case, that is, a recompiled for Intel X264/265 encoding and numbers of 60 and 100%, wich is 20% higher than what HFR got with Intel optimised such benches..

Same with FP where you are using the overly Intel optimised CB R15 that is a blatant "update" over 11.5 to give Intel an advantage they hardly got with the previous "bench", i never saw you quote anything that this bench who is relevant only for a same brand comparison.

So at the end it must be Intel s best case against AMD s worst case if i was to follow your methodology, not that you are the only one stuck in such dubbious practices..

 

[Sven_eng]

These clock Crusades are getting ridiculous. Repeat ad nuseum.

There is absolutely zero independent or verifiable or repeatable information that suggests Zen clocks well at good power.

Or even if it OCs anywhere near BD levels with that IPC.

Nothing.

Building strawmen to make it sound as tho this is already fact makes a few here look very desperate and disingenuous.

There is also absolutely nothing known or verifiable that AMD did not show a low leakage cherry chip.

So what about power?

Sent from HTC 10
(Opinions are own)

Did you already forget about Canard PC's power results showing the Ryzen ES with lower power than the 6900K?

 

[Vesku]

It's extremely unlikely Zen can hit 4+GHz and even come close to being kept cool by products expecting a 95w TDP. It was said they upped the voltage a bit for their 3.4GHz demo, not something needed for a chip that is comfortably hitting 4GHz near stock voltage.

If Zen had that kind of performance efficiency, compared to their 3.4GHz demo, the consumer release would be pushed back to 3Q/4Q so AMD could supply 100s of thousands of chips a quarter to Facebook, Google, Amazon etc.

 

[bjt2]

really? publishing in science and heterogeneous didn't first come to mind? 😛
Google translate would probably do a direct translation of the negative, anyway.


Anyway, OT, I know--it was just funny seeing that use. English is weird that way. It technically wouldn't be improper to create a word like inhomogeneous, but hetero/homogeneity are such prolific scientific terms that it just seems odd to resort to that. 😀

I never thought of that term. The italian word was "disomogeneo", the opposite of "omogeneo" homogeneous.

In the scientific paper we used that term to describe the inhomogeneity of the magnetic field in a magnetic resonance machine (i am a medical imaging researcher)...

 

[Sven_eng]

It's extremely unlikely Zen can hit 4+GHz and even come close to being kept cool by products expecting a 95w TDP. It was said they upped the voltage a bit for their 3.4GHz demo, not something needed for a chip that is comfortably hitting 4GHz near stock voltage.

If Zen had that kind of performance efficiency, compared to their 3.4GHz demo, the consumer release would be pushed back to 3Q/4Q so AMD could supply 100s of thousands of chips a quarter to Facebook, Google, Amazon etc.

If the sample used in the recent demo had it's voltage upped it's even better, as they also showed it with lower power usage than the 6900K and final versions should clock higher at the same 95W TDP.

 

[lolfail9001]

It's an ES and was allegedly overvolted for the new Horizon event to stay safe and still managed to stay under 95W at full load (Blender is not light...)

Blender is light, considering that 6700k hits and exceeds it's 90ish TDP in proper stress tests, while sitting at about 70 watts in Blender.
Also, "allegedly" i am devil incarnate.

 

[bjt2]

These clock Crusades are getting ridiculous. Repeat ad nuseum.

There is absolutely zero independent or verifiable or repeatable information that suggests Zen clocks well at good power.

Or even if it OCs anywhere near BD levels with that IPC.

Nothing.

Building strawmen to make it sound as tho this is already fact makes a few here look very desperate and disingenuous.

There is also absolutely nothing known or verifiable that AMD did not show a low leakage cherry chip.

So what about power?

Sent from HTC 10
(Opinions are own)

Jim Keller interview of some months ago in which he says that Zen has the same DNA of Zen and Jaguar. Meaning the best of both. Low power from jaguar and from BD? Low IPC? Or high clock (low FO4)?

 

[laamanaator]

Jim Keller interview of some months ago in which he says that Zen has the same DNA of Zen and Jaguar. Meaning the best of both. Low power from jaguar and from BD? Low IPC? Or high clock (low FO4)?

Saying that you've done something doesn't necessarily mean that you've actually succeeded at it or done it. Just saying.😉

 

[bjt2]

Blender is light, considering that 6700k hits and exceeds it's 90ish TDP in proper stress tests, while sitting at about 70 watts in Blender.
Also, "allegedly" i am devil incarnate.

We already calculated that Zen in blender draw under 80W, probabily about 75W (94W -10% loss in PSU -10% loss in VRMs)

 

[Nothingness]

Blender is light, considering that 6700k hits and exceeds it's 90ish TDP in proper stress tests, while sitting at about 70 watts in Blender.

Aren't those "proper" stress tests heavily using AVX2? IIRC my 4770K only reached (and exceeded TDP for short periods) only with mostly AVX-only worloads (LINPACK, Prime95).

 

[bjt2]

Saying that you've done something doesn't necessarily mean that you've actually succeeded at it or done it. Just saying.😉

If the intent is have the high clock of BD, the only mean I know is having low FO4. This probabilty was the meaning. If low FO4 means clocks higher enough, obviously depends on the process...

 

[krumme]

The takeaway from the Keller interview is imo the stark contrast between what he called "making the ocean boil" in what i asume is a reference to the design of BD, and then what he said about the design of Zen - that the plan for the design was made really fast when they had an overview of all the competences and IP.

Now AMD will have a lot of funky PR words for what makes Zen work but i think its just in its core a balanced solution with no obvious let downs or weak sides. Its just good old craftmanship in large scale. Thats the boring secret.

 

[The Stilt]

Yet when i pointed 30% and 35-40% IPC advantage for HW re PD in 7ZIP and AI chess games you came back with a special case, that is, a recompiled for Intel X264/265 encoding and numbers of 60 and 100%, wich is 20% higher than what HFR got with Intel optimised such benches..

Same with FP where you are using the overly Intel optimised CB R15 that is a blatant "update" over 11.5 to give Intel an advantage they hardly got with the previous "bench", i never saw you quote anything that this bench who is relevant only for a same brand comparison.

So at the end it must be Intel s best case against AMD s worst case if i was to follow your methodology, not that you are the only one stuck in such dubbious practices..

I have no issues if these two tests you mentioned are included in a suite of many other tests.
So are you saying X264 / X265 are Intel optimized, did I understand correctly? All of the performance critical code in these encoders is written in ASM, so it makes no difference if the actual encoder is compiled with GCC, MSVC or even with ICL with new architecture specific tunes allowed by ICL 2017.

Any actual evidence that any of the Cinebench versions would be more optimized for Intel architectures (from compiler side) than for let's say AMD or VIA? When you mention the difference between R11.5 and R15, I think the difference has more to do with the actual scene used in R11.5 than with anything else. R15 scene sees a vast performance boost when rendered with newer render engine (R18), however R11.5 receives none at all. Despite it is just a scene we are talking here, and none of the actual engine code brought from the original benchmark. Also it could have something to do with the difference in the utilized instructions (up to SSE2 in R11.5 and up to SSE3 in R15), however I don't see why AMD CPUs would perform worse relatively when SSE3 is also used. Regardless, it can be proven easily that there is no special CPU vendor dependant dispatch in Cinebenches (either by patching or running under VM). Because of that, when you claim that Cinebench is Intel optimized you base your claim entirely on that the benchmark itself would gain anything from a optimization to a specific architecture (similar to mtune in GCC).

I never use a single (or a single type of) benchmark to evaluate the performance on any platforms I test, or fool around with. I try to use as many different and different kind of workloads to evaluate the performance as I possibly can. But obviously as a human being, I still have some bias towards the workloads I personally find important for my own use.

ps. New ICL (15-17) versions are the fastest compilers for Zen, basically regardless of the used settings 😉

 

[bjt2]

Actually if i remember well, 6900K score vs FX8370 score was 2.5x better in Cinebench R15 and 3.3x better in blender, so it seems that Cinebench is better optimized for AMD architectures, as FX8370 losses less in cinebench than in blender...

 

[lolfail9001]

We already calculated that Zen in blender draw under 80W, probabily about 75W (94W -10% loss in PSU -10% loss in VRMs)

You've already calculated that Zen should have 4Ghz stock in 95W TDP 🙂

Aren't those "proper" stress tests heavily using AVX2? IIRC my 4770K only reached (and exceeded TDP for short periods) only with mostly AVX-only worloads (LINPACK, Prime95).

Well, they do.

 

[krumme]

As i understand it when designing a cpu you can target your IPC pretty precise, where as the Fmax is more uncertain.
For the last 2 years AMD must have known extremely precise where the IPC would end. Since tapeout it must have been more or less spot on. Fottemberg claimed Zen had bwe/hsw IPC june 2015 - and he got it from somewhere ! - while his higher than anticipated Fmax came dec 2016.

The 40% number can mean a good deal different, but it seems to me they were either sandbagging to compensate for eventual Fmax letdown, or they were making a smokescreen? - the latter fits their current strategy of not letting the public know anything, but Lisa Su is kind of the sandbagging type too...hmm

 

[The Stilt]

Actually if i remember well, 6900K score vs FX8370 score was 2.5x better in Cinebench R15 and 3.3x better in blender, so it seems that Cinebench is better optimized for AMD architectures, as FX8370 losses less in cinebench than in blender...

Not optimized better or worse for AMD in that sense, but being a legacy workload Cinebenches don't allow newer Intel parts to strech their muscles (AVX, AVX2, FMA3).

 

[bjt2]

You've already calculated that Zen should have 4Ghz stock in 95W TDP 🙂

Well, they do.

This was an actual measure. Or you want to say that PSU and VRMs has 100% efficiency...

 

[zinfamous]

It is not same meaning.Something being inhomogeneous doesn't mean it's heterogeneous;as always context.
Edit: Ah,yes,most appropriate word in this case is variance.

yeah, that is a good point. I thought that might be the case, but my biology-mind isn't too familiar with (or requiring of) a more nuanced difference between the two. 😀

 

[lolfail9001]

This was an actual measure. Or you want to say that PSU and VRMs has 100% efficiency...

No, i want to say that you compare either measured numbers or estimations with same methodology. As such, my claim is that load was so light, 6700k after all the inefficiencies was drawing just under 70W, in spite of way higher TDP and even higher peak power consumption.

Also, you can mindcraft the "real" power consumption all you want, TDP is provided with measured numbers, after all.

 

[AtenRa]

I never thought of that term. The italian word was "disomogeneo", the opposite of "omogeneo" homogeneous.

In the scientific paper we used that term to describe the inhomogeneity of the magnetic field in a magnetic resonance machine (i am a medical imaging researcher)...

Better use the word "eterogeneo" for engineering (Heterogeneous in English) 😉

 

[bjt2]

No, i want to say that you compare either measured numbers or estimations with same methodology. As such, my claim is that load was so light, 6700k after all the inefficiencies was drawing just under 70W, in spite of way higher TDP and even higher peak power consumption.

Also, you can mindcraft the "real" power consumption all you want, TDP is provided with measured numbers, after all.

The only real measure of TDP is the definition: you should do calorimetry. Power at PSU or before VRMs are excess estimations. You should measure the Idd at Vcore to know real TDP without measuring heat, but it is not feasible because current is in the order of 100 Amperes on many pins...

I was performing excess estimations to be safe. There are so many unknowns that is difficult to make precise statements. But you can safely do excess estimations... If you think than my estimations are too optimistic, prove it. I took so ample margins that they will be largely bested by actual results...

 

[Abwx]

Not optimized better or worse for AMD in that sense, but being a legacy workload Cinebenches don't allow newer Intel parts to strech their muscles (AVX, AVX2, FMA3).

It s the other way around, Cinebench R15 give Intel s CPUs an advantage that they could actually get only thanks to said new instructions.

We can check the thing using the numbers rather than urban legends, the 4770K score 791, that is about 24% more than the FX8350, now let see two different renderers both optimised for HW FPUs :

http://www.hardware.fr/articles/940-9/cpu-rendu-3d-mental-ray-v-ray.html

In case you want to see the 20-34% improvements with HW over previous gen in those tests, to make sure that they are optimised accordingly :

http://www.hardware.fr/articles/897-25/gains-moyennes-cpu.html

See?.

It s 15-18% advantage for HW, and in both cases the FX outmatch SB and IB contrary to what happens with CB R15 ,as you pointed it they changed the scene, and they didnt do so by chance.

 

[lolfail9001]

I took so ample margins that they will be largely bested by actual results...

We'll see when it hits us, shall we 🙂?

 

[bjt2]

Better use the word "eterogeneo" for engineering (Heterogeneous in English) 😉

In this case i agree. In my paper inhomogeneity was more appropriate: other papers and technical manuals were using that same term...