Separate names with a comma.
Discussion in 'CPUs and Overclocking' started by Dresdenboy, Mar 1, 2016.
But if there are frequency issues with the chip you will not be able to overclock it.
Don't forget two important things:
1) 8T Ryzen supposedly has max TDP of 65W
2)8T Ryzen supposedly can clock to 4.2Ghz on solid cooling without any issues. Hopefully even at stock config XFR will take it to similar boost clocks but that remains to be seen.
A flaw does not affect the ability of a part to hit high frequencies.
They are two distinctly different phenomena and should have no link. I've read about possible architectural idiosyncrasies limiting clocks on a cut down chip due to the CCX layout - but am not paying a great deal of heed to them.
my old sig
ASUS A7N8X2.0-Deluxe 1008mod3-4283Sata AMD Athlon XP 3200+ Barton @2.20 GHz OCZ PC3200 EL Platinum Edition 2GB 2.5-3-2-9-1T@400DDR Dual Channel Enabled ATI Radeon X1650pro 512MB SoundBlaster Live! 5.1
I'll probably wait for the Zen II
The first phenom sucked till the II came out
Selling for a low price is better than throw away... You can compensate with higher SKU prices...
My hypothesis is that the ES were purposely low clocked, because the ES are used only for testing. They does not need to have final clocks. Only final consumption (at last), and this can be simulated with proper overvolt. I don't think that from a 3.6GHz base 8c they can't produce a 4-4.2GHz base 4c...
Targeted for QX6700, then Intel launched QX9650.
I'm just making a wild guess here, but it might be because of the way you choose the working cores out of the CCXs. If you are choosing two cores each from both the CCXs, then there is a possibility that the overall distance that a signal has to travel affects the propagation time, which in turn will affect what clock speeds are reachable.
Of course, it could all be false and Ryzen clocks very well even with the 4C chips.
I would say because we haven't had real confirmation on this speculation.
We've heard both ways... that 6c definitely exists, and that 6c is impossible due to the CCX layout.
It's all speculation, as the only parts we've seen are the full 8c/16t demonstrated.
EDIT: I see you were discussing the lower clocked cut-down chips. I have no answer from that, but my point stands regarding all of this potentially being FUD.
I've been expecting $450-600 top SKU ever since they showed those "vs 6900K" demos. Softening the blow of having somewhat pricey SKUs "it's half the price of 6900K but beats it for certain uses".
Actually the reliable sources that have been leaking Zen information for years have all agreed that 6C is possible.
It's just the tech rumormill websites that spew whatever the other site farts in a circular fashion that claimed 6C is impossible.
'cos the reasoning falls apart if AMD were to fuse off one CCX completely.
It would be nice if AMD get aggressive on 4C/8T pricing. I think a price of USD 180 would have a disruptive effect. It will make the 7350k and most of the non k core i5 irrelevant. AMD need to hit atleast 4 Ghz turbo for their 4C. They do not want to fall too behind in stock benchmarks even though most people who buy it are going to slap a good air or hybrid cooler and max out the clocks.
Of course it is impossible, about as Trump=USA president was impossible six months ago.
As usual the Internet is full of "very smart unemployed CPU designers".
$180-199 seems quite reasonable for a 65W 4GHz 4C/8T Ryzen. Properbly enough to explain the Intel "panic attack"...
The legendary K7S5A. Those were the days.
Of course. But Barton was a still a nice chip, especially coupled with one of those chipsets mentioned.
I thought flawed chips were rare these days?
Have you seen this by David Kanter:
Yep. He expects Sandy Bridge level int performance and not much on fp.
And the 40% referred to int_rate... A Throughput bench. No different than what I said they might have done, looking at historical data.
"AMD has disclosed little useful performance data, but it provided guidance that Zen’s IPC is 40% better on SPECint_rate2006 than Excavator’s,"
Sent from HTC 10
(Opinions are own)
How can the referred number be from a rate benchmark when chief architect at Hot Chips stated that 40% IPC is single thread improvement and SMT comes on top of that?
Looks like D. Kanter was lazy when he wrote the article. Not to mention that 40% figure is old and will be updated to something else at launch day
The article was from August last year.
I sure as hell wouldn't sacrifice 28.5% more clockspeed for 4 more HT threads when I already have 4 threads from full cores.
He also expects 3.2GHz which is at least 12.5% lower than what we know is true and Zen's IPC has been upgraded to 55%, which is 15% more than expected. You can do the maths on that.
Thanks , I totally missed the date of the article lol
I guess that explains it, he didn't have complete data at that time.
Is there a link to this new 55%> excavator claim? ( or some sort of citation at least)