Question List of DRAM-less SSD controllers?

[cbn]

I did find the following Dec. 2014 announcement of two DRAM-less Marvell controllers that support TLC NAND :

http://www.storagereview.com/marvell_88nv1140_and_88nv1120_dramless_nvme_ssd_controllers_announced

Marvell 88NV1140 and 88NV1120 DRAM-less NVMe SSD Controllers Announced

Marvell has announced the 88NV1140 and 88NV1120, the first DRAM-less NVMe SSD controllers for mass market mobile computing solutions with NANDEdge low-density parity check (LDPC) technology supporting TLC and 3D NAND. Marvell’s new performance-heavy controllers allow for small form factor SSD solutions, which can integrate into low-z-height tablets, Chrome devices, and the upcoming new 2-in-1 hybrid/detachable mobile PC platforms.

The small 8x8mm per package form factor of Marvell’s 88NV1140 and 88NV1120 allows for SSD drives as small as M.2 2230 (30 mm in length). In addition, the new controllers make way for the development of an NVMe BGA or SATA BGA SSD running on embedded SRAM through multiple-chip-package (MCP) integration with NAND. The 88NV1140 and 88NV1120 controllers also use 28 nm low-power CMOS process node technology, which enable Marvell to claim best-in-class active power, all the while supporting the low power modes (L1.2 for PCIe and DevSlp for SATA devices). Both new controllers use Marvell’s third-generation NANDEdge error-correction technology.

By developing single code for NANDEdge, SSD firmware developers have the ability to leverage one code to the other for advanced error-correcting technology in data integrity, endurance and reliability. Additionally, with Marvell’s use of NANDEdge LDPC technology, the controllers can support 15/16nm TLC and 3D NAND, which results in low enabling cost of TLC and 3D NAND. The NVMe design has also passed in-house SSD validation as well as third-party operating system and platform compatibility testing.

Marvell 88NV1140 and 88NV1120 features include:

88NV1140:
AHCI and NVMe support over PCIe Gen3x1
Fully hardware automated NVMe 1.1b support
Low power management (L1.2) design
88NV1120:
SATA 6Gb/s support
TA DevSlp support
88NV1140 and 88NV1120:
Powerful Dual core Cortex R5 CPU’s
Embedded SRAM with hardware accelerators to optimize IOPS performance
ONFI3 and Toggle2 NAND support
NANDEdge error-correction: 15nm TLC and 3D NAND support using LDPC technology to boost endurance and reliability
BGA SSD and M.2/2.5 slim form factor support with thermal optimization and small package size
28nm low power CMOS process

https://origin-www.marvell.com/storage/ssd/88NV1140-88NV1120/

In addition to Value-line SSD enabling, the 88NV1140/88NV1120 design is also optimized for Small Form Factor applications. By using 28nm CMOS process node technology, the controller is perfect for multiple-chip-package (MCP) integration running on embedded SRAM without external memory. It’s perfect for low-z-height or compact mobile devices looking for SSD performance, like premium tablet or 2-in-1 notebook. The standalone packed version also help enable modules as small as M.2 2230(3cm in length).

ADATA Premier SP580 is now using the Marvell 88NV1120 controller in conjunction with Sandisk 15nm TLC NAND :

http://www.anandtech.com/show/10410...troller?_ga=1.174274402.1555198561.1466157129

 

[cbn]

Thought this might be relevant for people interested in this thread:

http://www.anandtech.com/show/9942/...y-buffer-for-dramless-88nv1140-ssd-controller

The Host Memory Buffer (HMB) feature in NVMe 1.2 allows a drive to request exclusive access to a portion of the host system's RAM for the drive's private use. This kind of capability has been around forever in the GPU space under names like HyperMemory and TurboCache, where it served a similar purpose: to reduce or eliminate the dedicated RAM that needs to be included on peripheral devices.

...

At the low end of the SSD market, recent controller configurations have chosen instead to cut costs by not including any external DRAM. There are combined savings of die size and pin count for the controller in this configuration, as well as reduced PCB complexity for the drive and eliminating the DRAM chip from the bill of materials, which can add up to a competitive advantage in the product segments where performance is a secondary concern and every cent counts. Silicon Motion's DRAM-less SM2246XT controller has stolen some market share from their own already cheap SM2246EN, and in the TLC space almost everybody is moving toward DRAM-less options.

That is a good article, here is the entire content:

Marvell Implements Host Memory Buffer for DRAM-less 88NV1140 SSD Controller

by Billy Tallis on January 12, 2016 7:30 AM EST

The first version of the Non-Volatile Memory Express (NVMe) standard was ratified almost five years ago, but its development didn't stop there. While SSD controller manufacturers have been hard at work implementing NVMe in more and more products, the protocol itself has acquired new features. Most of them are optional and most are intended for enterprise scenarios like virtualization and multi-path I/O, but one feature introduced in the NVMe 1.2 revision has been picked up by a controller that will likely see use in the consumer space.

The Host Memory Buffer (HMB) feature in NVMe 1.2 allows a drive to request exclusive access to a portion of the host system's RAM for the drive's private use. This kind of capability has been around forever in the GPU space under names like HyperMemory and TurboCache, where it served a similar purpose: to reduce or eliminate the dedicated RAM that needs to be included on peripheral devices.

Modern high-performance SSD controllers use a significant amount of RAM, and typically we see a ratio of 1GB of RAM for every 1TB of flash. The controllers are usually conservative about using that RAM as a cache for user data (to limit the damage of a sudden power loss) and instead it is used to store the organizational metadata necessary for the controller to keep track of what data is stored where on the flash chips. The goal is that when the drive recieves a read or write request, it can determine which flash memory location needs to be accessed based on a much quicker lookup in the controller's DRAM, and the drive doesn't need to update the metadata copy stored on the flash after every single write operation is completed. For fast consistent performance, the data structures are chosen to minimize the amount of computation and number of RAM lookups required at the expense of requiring more RAM.

At the low end of the SSD market, recent controller configurations have chosen instead to cut costs by not including any external DRAM. There are combined savings of die size and pin count for the controller in this configuration, as well as reduced PCB complexity for the drive and eliminating the DRAM chip from the bill of materials, which can add up to a competitive advantage in the product segments where performance is a secondary concern and every cent counts. Silicon Motion's DRAM-less SM2246XT controller has stolen some market share from their own already cheap SM2246EN, and in the TLC space almost everybody is moving toward DRAM-less options.

The downside is that without ample RAM, it is much harder for SSDs to offer high performance. Even with clever firmware, DRAM-less SSDs can cope surprisingly well with just the on-chip buffers, but they are still at a disadvantage. That's where the Host Memory Buffer feature comes in. With only two NAND channels on the 88NV1140, it probably can't saturate the PCIe 3.0 x1 link under even the best circumstances, so there will be bandwidth to spare for other transfers with the host system. PCIe transactions and host DRAM accesses are measured in tens or hundreds of nanoseconds compared to tens of microseconds for reading from flash, so it's clear that a Host Memory Buffer can be fast enough to be useful for a low-end drive.

The trick then is to figure out how to get the most out of a Host Memory Buffer, while remaining prepared to operate in DRAM-less mode if the host's NVMe driver doesn't support HMB or if the host decides it can't spare the RAM. SSD suppliers are universally tight-lipped about the algorithms used in their firmware and Marvell controllers are usually paired with custom or third-party licensed firmware anyways, so we can only speculate about how a HMB will be used with this new 88NV1140 controller. Furthermore, the requirement of driver support on the host side means this feature will likely be used in embedded platforms long before it finds its way into retail SSDs, and this particular Marvell controller may never show up in a standalone drive. But in a few years time it might be standard for low-end SSDs to borrow a bit of your system's RAM. This becomes less of a concern as we move through successive platforms having access to more DRAM per module in a standard system.

The last part though (the host side driver support) makes me wonder when we will see this HBM feature being used?

 

[hojnikb]

Silicon Motion SM2258XT is a dram-less version of the SM2258 and according to the product brief in the link below it does support planar TLC NAND in addition to 3D NAND :

http://www.siliconmotion.com/A3.2_Partnumber_Detail.php?sn=7

Any info on design wins for this controller ?
They also dont mention SLC caching ?

 

[VirtualLarry]

The last part though (the host side driver support) makes me wonder when we will see this HBM feature being used?

Requiring "driver support" scares me a bit. Both in terms of overall OS support (Will they have drivers for Win7? Win11? Linux?), and in terms of device support (Samsung Magician doesn't support SM951 OEM M.2 drives, even though they are very popular with end-users.)

 

[cbn]

Silicon Motion SM2258XT is a dram-less version of the SM2258 and according to the product brief in the link below it does support planar TLC NAND in addition to 3D NAND :

http://www.siliconmotion.com/A3.2_Partnumber_Detail.php?sn=7

Any info on design wins for this controller ?

I haven't seen any design wins yet, but will definitely update this thread when I find some.

They also dont mention SLC caching ?

Yeah that is pretty weird considering the DRAM-less SM2256S used in the Sandisk Z510 and new TLC Sandisk SSD Plus has SLC caching.

http://www.tweaktown.com/reviews/7726/sandisk-ssd-plus-z410-sata-iii-review/index.html

SanDisk pairs their own 15nm planar TLC (Triple-Level-Cell or 3-bit per cell) flash with SMI's 4-channel SM2256S TLC specific controller on both the SSD Plus and Z410. This version of SMI's controller allows for a DRAM-less design which lowers overall SSD production costs. We did not notice any physical difference in PCB components between the SSD Plus and Z410 480GB SSDs. Same flash, same controller, same PCB. We believe the only difference between the two drives is firmware. Both drives employ SLC caching to boost burst write performance.

 

[cbn]

Requiring "driver support" scares me a bit. Both in terms of overall OS support (Will they have drivers for Win7? Win11? Linux?), and in terms of device support (Samsung Magician doesn't support SM951 OEM M.2 drives, even though they are very popular with end-users.)

Yeah, I'm concerned about that as well. (Intel, AMD or Microsoft? Who releases the driver first?)

A possible bright side though is that the PCIe 3.0 x 1 88NV1140 is based on the same general design as the SATA 6 Gbps 88NV1120 (see post #7)

So if the 88NV1120 works well enough then we should expect at least the same level of performance (if not more) from 88NV1140 even if confined to purely DRAM-less operation.

 

[VirtualLarry]

Yeah, I'm concerned about that as well. (Intel, AMD or Microsoft? Who releases the driver first?)

A possible bright side though is that the PCIe 3.0 x 1 88NV1140 is based on the same general design as the SATA 6 Gbps 88NV1120 (see post #7)

So if the 88NV1120 works well enough then we should expect at least the same level of performance (if not more) from 88NV1140 even if confined to purely DRAM-less operation.

I guess I don't see such a huge point to a PCI-E 3.0 x1 SSD.

From what, 560MB/s, to 900MB/s? Yeah, sure, it's an improvement, but wouldn't 2-4x that speed be better? How much more could it cost to implement more PCI-E lanes on controller chip?

 

[cbn]

I guess I don't see such a huge point to a PCI-E 3.0 x1 SSD.

From what, 560MB/s, to 900MB/s? Yeah, sure, it's an improvement, but wouldn't 2-4x that speed be better? How much more could it cost to implement more PCI-E lanes on controller chip?

I'd rather have at least PCIe 3.0 x 2 as well.

And according to the Anandtech article here, going with PCIe 3.0 x 2 is cheaper than PCIe 3.0 x 4 (which requires different packaging and a move to 28nm process tech.)

On the PCIe side JMicron has canceled the JMF810 and JMF811 controllers, and will now be focusing solely on the JMF815. JMicron made the decision to concentrate on the value segment and thus the JMF815 is a PCIe 3.0 x2 design with four NAND channels (no NVMe, unfortunately). A four-lane design would have required moving to 28nm process node, which would have increased the cost substantially and the packaging would have to move away from BGA to FCBGA (used by e.g. Phison and SandForce in their upcoming PCIe controllers) that would further increase the cost. I think it's a good play from JMicron to focus on a segment that isn't as populated because right now everyone is focusing solely on performance with PCIe, but ultimately cost and power consumption will be a major factors in widespread adoption and JMicron should have an advantage there if the JMF815 is executed well.

First engineering samples of the JMF680 and JMF815 are expected to be ready in Q4'15 with first retail products entering the market in early 2016.

One of the trends I saw at Computex was the move towards DRAM-less SSD controllers. The JMF608 has been relatively popular in China given its ultra-low cost and its successor, the JMF60F, will be available within the next few months. It features an improved ECC engine and a larger capacity support as well as a new, cheaper QFN packaging. Following this trend, I wouldn't be surprised if JMicron also has plans for DRAM-less versions of the JMF680 and JMF815.

 

[cbn]

Regarding Marvell 88NV1120/88NV1140 controller being on 28nm, here is what Marvell wrote about that.

https://origin-www.marvell.com/storage/ssd/88NV1140-88NV1120/

In addition to Value-line SSD enabling, the 88NV1140/88NV1120 design is also optimized for Small Form Factor applications. By using 28nm CMOS process node technology, the controller is perfect for multiple-chip-package (MCP) integration running on embedded SRAM without external memory. It’s perfect for low-z-height or compact mobile devices looking for SSD performance, like premium tablet or 2-in-1 notebook. The standalone packed version also help enable modules as small as M.2 2230(3cm in length).

So according to the above quote one reason for using the smaller than expected process tech (for a value controller) is to allow for embedded SRAM under the hood.

My question then is how much embedded SRAM and how will this affect the speed of the SSD at various capacities?

They also mention a standalone version of this controller which I presume does not have the embedded SRAM. Perhaps this is the configuration we will see once HMB drivers become available?

With that mentioned, I do wonder how this controller would work with both the embedded SRAM and the HMB driver allowing for the use of system RAM as well?

 

[cbn]

Some additional lithography info:

According to the Anandtech Intel 540s article here, Silicon Motion SM2258 (which would include the DRAM-less SM2258XT variant) uses 40nm process technology. This compared to the 55nm SM2256, also used DRAM-less as the SM2256S in the Sandisk SSD Plus and Sandisk Z410.

 

[cbn]

http://www.anandtech.com/show/10572/marvell-announces-nvme-controller-for-dramless-pcie-ssds

Marvell introduces a new DRAM-less PCIe 3.0 x 2 controller (88NV1160) with turnkey firmware supporting 15 nm TLC, 3D TLC, 3D QLC:

Marvell has announced its new controller for affordable and miniature SSDs, the 88NV1160. The chip can be used to build small form-factor SSDs in M.2 as well as BGA packages. The 88NV1160 supports all modern and upcoming types of NAND flash, LDPC error correction, NVMe protocol and other advantages of modern SSD controllers, but it does not require external DRAM buffers so to reduce BOM costs of upcoming SSDs.

The Marvell 88NV1160 is a quad-channel controller that supports PCIe 3.0 x2 interface, NVMe 1.3 protocol (in addition to AHCI) as well as various types of NAND flash memory, including 15 nm TLC, 3D TLC as well as 3D QLC with ONFI 3.0 interface with up to 400 MT/s transfer rates. The 88NV1160 controller is powered by dual-core ARM Cortex-R5 CPUs along with embedded SRAM with hardware accelerators to optimize IOPS performance. The chip supports Marvell’s third-generation LDPC error correction technology (which the company calls NANDEdge ECC) in a bid to enable high endurance of drives featuring ultra-thin TLC or 3D QLC memory.

The 88NV1160 controller is specifically tailored for upcoming affordable SSDs, which is why it does not officially support SLC and 2D MLC NAND. Maximum capacity of a 3D QLC-based SSD featuring the 88NV1160 controller is expected to be around 1 TB, which should be enough for entry-level SSDs (as well as solid-state storage solutions for premium tablets, ultrabooks and other types of computing devices). As for performance, Marvell mentioned 1600 MB/s maximum read speed for such SSDs.

The new chip from Marvell is made using 28 nm process technology and is shipped in 9 × 10 mm TFBGA package, which can be used to build SSDs in BGA (M.2-1620 and smaller) packages as well as drives in M.2-2230/2242 form-factors. The 88NV1160 controller uses 3.3V/1.8V/1.2V power supply, in accordance with the M.2 standards.

The 88NV1160 is not the first controller from Marvell that does not require any external DRAM buffers. The company also offers low-cost 88NV1120 with SATA interface as well as 88NV1140 for PCIe 3.0 x1 SSDs. All of the aforementioned controllers are based on two ARM Cortex-R5 cores, feature Marvell’s third-gen LDPC implementation and support modern types of NAND flash memory (15nm 2D TLC and 3D TLC/QLC). However, the new 88NV1160 is the newest DRAM-less controller from the company, which is designed for rather advanced SSDs with up to 1600 MB/s read speed. Still, the 88NV1160 is clearly a solution for affordable drives because unlike the high-end 88SS1093 (or its less advanced brother, the 88SS1094) it does not support 2D MLC and SLC NAND flash and cannot take advantage of eight NAND channels (which is why it does not need PCIe 3.0 x4).

The developer did not reveal when it expects the first SSDs based on the 88NV1160 controller to hit the market, but it indicated that the chip is available for sampling globally. In addition, the company indicated that it offers turnkey firmware to its customers so to enable faster time to market.

 

[VirtualLarry]

The Marvell 88NV1160 is a quad-channel controller that supports PCIe 3.0 x2 interface, NVMe 1.3 protocol (in addition to AHCI) as well as various types of NAND flash memory, including 15 nm TLC, 3D TLC as well as 3D QLC with ONFI 3.0 interface with up to 400 MT/s transfer rates. The 88NV1160 controller is powered by dual-core ARM Cortex-R5 CPUs along with embedded SRAM with hardware accelerators to optimize IOPS performance. The chip supports Marvell’s third-generation LDPC error correction technology (which the company calls NANDEdge ECC) in a bid to enable high endurance of drives featuring ultra-thin TLC or 3D QLC memory.

3D QLC? That... kind of scares me. And to think, this new controller doesn't even support 2D MLC ... at all? I guess that shows where this market is going.

Buy up those older SATAII Intel SSDs, while you can, people. Good old big-nm 2D MLC NAND.

Edit: And being a PCI-E x2 controller... why not re-purpose some of those SATA-Express ports, with their PCI-E x2 electrical connections, and turn them into M.2 / U.2 slots.

 

[Billy Tallis]

3D QLC is something everybody is talking about, but only in generalities; nobody is actually manufacturing any yet and I haven't heard of any serious plans yet to use it outside of a narrow range of enterprise applications where it can be treated as write-once/read-many memory. But it's one of the options people are now having to think about.

At the opposite end of the spectrum, planar MLC just isn't worth mentioning for an upcoming budget SSD controller. To my knowledge there are no technical barriers to pairing them together, but nobody expects that to be a sensible product to be selling by the time it could be hitting the shelves.

 

[cbn]

Tweaktown preview of Phison S11 with Toshiba 3D TLC and Micron 3D MLC NAND:

http://www.tweaktown.com/articles/7...iew-toshiba-bics-tlc-micron-3d-mlc/index.html

Both are 256GB drives. 4KQ32T1 read scores look good!

From the conclusion:

http://www.tweaktown.com/articles/7...ew-toshiba-bics-tlc-micron-3d-mlc/index9.html

First off we want to thank Phison Electronics for giving TweakTown the opportunity to test the S11 engineering samples plucked from their Flash Memory Summit display board. Secondly, we want to congratulate Phison for engineering fire-breathing performance with only two-channels and zero DRAM cache or overprovisioning. We believe that Phison S11-powered SSDs will sell like hotcakes when they hit retail channels. Compared with other modern DRAM-less solutions we've tested, the S11-powered SSDs we tested today are in a class of their own. Nothing else is even close.

It looks like this one is a winner in comparison to what Tweaktwon reported with the Phison S9 equipped Patriot Blaze. At this point it will be interesting to see how well it would do with 15nm planar TLC.

 

[VirtualLarry]

http://www.anandtech.com/show/10561/maxiotek-unveils-mk8115-lowcost-ssd-controller

New blurb about MaxioTek's newest DRAM-less controller.

 

[cbn]

I wonder if we will see BGA SSD using the dram-less Marvell PCIe 3.0 x 2 controller from post #36 coupled with one of the 64GB Toshiba 3D TLC NAND packages from post #39?

My guess is that based on the high sequential read performance of 2000 MB/s+ for PCIe 3.0 x 4 drives with 128GB a drive with PCIe 3.0 x 2 and 64GB should still do very well.

64GB BGA SSD vs. 64GB eMMC (with SLC cache)?

 

[Turab]

Yup.

Silicon Motion 2256S is an also Dram-less controller. SanDisk SSD Plus G26 ( G25 version uses the 2246XT ) got that controller. However, the performance bites the dust:

http://www.ssdlabs.net/incelemeler/makul-fiyatli-120gb-240gb-ssd-satin-alma-rehberi-2016/?ps=19

 

[cbn]

The Marvell 88NV1160 is a quad-channel controller that supports PCIe 3.0 x2 interface, NVMe 1.3 protocol (in addition to AHCI) as well as various types of NAND flash memory, including 15 nm TLC, 3D TLC as well as 3D QLC with ONFI 3.0 interface with up to 400 MT/s transfer rates. The 88NV1160 controller is powered by dual-core ARM Cortex-R5 CPUs along with embedded SRAM with hardware accelerators to optimize IOPS performance. The chip supports Marvell’s third-generation LDPC error correction technology (which the company calls NANDEdge ECC) in a bid to enable high endurance of drives featuring ultra-thin TLC or 3D QLC memory.

3D QLC? That... kind of scares me. And to think, this new controller doesn't even support 2D MLC ... at all? I guess that shows where this market is going.

Buy up those older SATAII Intel SSDs, while you can, people. Good old big-nm 2D MLC NAND.

Edit: And being a PCI-E x2 controller... why not re-purpose some of those SATA-Express ports, with their PCI-E x2 electrical connections, and turn them into M.2 / U.2 slots.

3D QLC is something everybody is talking about, but only in generalities; nobody is actually manufacturing any yet and I haven't heard of any serious plans yet to use it outside of a narrow range of enterprise applications where it can be treated as write-once/read-many memory. But it's one of the options people are now having to think about.

At the opposite end of the spectrum, planar MLC just isn't worth mentioning for an upcoming budget SSD controller. To my knowledge there are no technical barriers to pairing them together, but nobody expects that to be a sensible product to be selling by the time it could be hitting the shelves.

I wonder if that upcoming SK Hynix 14nm MLC would have worked?

(re: being on 14nm it should be cheaper to make than 16nm. So maybe 14nm MLC would have been the same cost to make as 16nm TLC which might be roughly the same cost to make as 3D TLC?)

 

[cbn]

Zotac T400 2.5" SSD (120GB and 240GB) has Phison S11 and Toshiba 15nm TLC.

 

[cbn]

OCZ VX500 is dram-less 15nm MLC in 128GB, 256GB and 512GB capacities (1TB has 256MB of DRAM):

http://www.anandtech.com/show/10674/the-toshiba-ocz-vx500-ssd-review

 

[hojnikb]

OCZ VX500 is dram-less 15nm MLC in 128GB, 256GB and 512GB capacities (1TB has 256MB of DRAM):

http://www.anandtech.com/show/10674/the-toshiba-ocz-vx500-ssd-review

Any word on who actually makes the controller and what model it is ?
Could this actually be Phison S11 ?

 

[Concerned Citizen]

RAMless is bad.You may as well use onboard.
Don't forget Primocache.

 

[cbn]

Any word on who actually makes the controller and what model it is ?
Could this actually be Phison S11 ?

It uses Toshiba's TC358790 controller which is also used in the earlier Toshiba Q300 (non-Pro) series.

(Not sure if this is a rebrand of an existing controller (Eg, Toshiba TC58 = Phison S10) or a Toshiba original? I haven't been able to find any info yet)

 

[Glaring_Mistake]

It uses Toshiba's TC358790 controller which is also used in the earlier Toshiba Q300 (non-Pro) series.

(Not sure if this is a rebrand of an existing controller (Eg, Toshiba TC58 = Phison S10) or a Toshiba original? I haven't been able to find any info yet)

Nordichardware thinks that the TC358790 seems likely to be a rebranded (and DRAM-less) Marvell 88SS9187 or 88SS9189.

Also the TC358790 is actually the controller used in the Q300 Pros, the Q300 (non-Pro series) use the TC58NC1000 (rebranded Phison S10).

See: http://www.toshiba.eu/hard-drives/solid-state/ssd-q300/hdts812ezsta/
http://www.toshiba.eu/hard-drives/solid-state/ssd-q300pro/hdtsa25ezsta/

 

[cbn]

Phison S11 with 15nm planar MLC:

http://allssd.ru/smartbuy-s11-2280t-obzor/